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authorRex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>2021-12-28 13:07:06 +0800
committerHung-Te Lin <hungte@chromium.org>2022-01-01 03:29:08 +0000
commit0069f6a18cf52e7a7da9c993e8b120403cae7112 (patch)
treee2cfd3a5acd7e25820feffddfcfd17f260a61604 /src/soc
parent100c2f6d38c2f92647655bf1013bf5c38a847799 (diff)
soc/mediatek/mt8186: Add support for regulator VRF12/VCN33
To provide power to PS8640, the eDP bridge IC on krabby, add control of VRF12 and VCN33 to set voltage from MT6366. TEST=measure 1.2V from VRF12 and 3.3V from VCN33. BUG=b:210806060 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: I55a9ca16e1e335e9355d0a1b30c278a9969db197 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60446 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/mediatek/common/include/soc/regulator.h2
-rw-r--r--src/soc/mediatek/mt8186/include/soc/mt6366.h6
-rw-r--r--src/soc/mediatek/mt8186/mt6366.c73
3 files changed, 81 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/include/soc/regulator.h b/src/soc/mediatek/common/include/soc/regulator.h
index 5068f50779..84bb364afd 100644
--- a/src/soc/mediatek/common/include/soc/regulator.h
+++ b/src/soc/mediatek/common/include/soc/regulator.h
@@ -18,6 +18,8 @@ enum mtk_regulator {
MTK_REGULATOR_VMC,
MTK_REGULATOR_VPROC12,
MTK_REGULATOR_VSRAM_PROC12,
+ MTK_REGULATOR_VRF12,
+ MTK_REGULATOR_VCN33,
MTK_REGULATOR_NUM,
};
diff --git a/src/soc/mediatek/mt8186/include/soc/mt6366.h b/src/soc/mediatek/mt8186/include/soc/mt6366.h
index af77da225d..2315a24a76 100644
--- a/src/soc/mediatek/mt8186/include/soc/mt6366.h
+++ b/src/soc/mediatek/mt8186/include/soc/mt6366.h
@@ -43,10 +43,14 @@ enum {
PMIC_VSRAM_PROC12_OP_EN = 0x1b90,
PMIC_VSRAM_PROC12_DBG0 = 0x1ba2,
PMIC_VSRAM_PROC12_VOSEL = 0x1bf0,
+ PMIC_LDO_VRF12_CON0 = 0x1c30,
+ PMIC_LDO_VRF12_OP_EN = 0x1c32,
PMIC_LDO_VMC_CON0 = 0x1cc4,
PMIC_LDO_VMC_OP_EN = 0x1cc6,
PMIC_LDO_VMCH_CON0 = 0x1cd8,
PMIC_LDO_VMCH_OP_EN = 0x1cda,
+ PMIC_LDO_VCN33_CON0_0 = 0x1d1c,
+ PMIC_VCN33_ANA_CON0 = 0x1e28,
PMIC_VSIM2_ANA_CON0 = 0x1e30,
PMIC_VMCH_ANA_CON0 = 0x1e48,
PMIC_VMC_ANA_CON0 = 0x1e4c,
@@ -61,6 +65,8 @@ enum mt6366_regulator_id {
MT6366_VMC,
MT6366_VPROC12,
MT6366_VSRAM_PROC12,
+ MT6366_VRF12,
+ MT6366_VCN33,
MT6366_REGULATOR_NUM,
};
diff --git a/src/soc/mediatek/mt8186/mt6366.c b/src/soc/mediatek/mt8186/mt6366.c
index 5cec47a04a..9ca7c05253 100644
--- a/src/soc/mediatek/mt8186/mt6366.c
+++ b/src/soc/mediatek/mt8186/mt6366.c
@@ -705,6 +705,68 @@ static void pmic_set_vmc_vol(u32 vmc_uv)
pwrap_write_field(PMIC_LDO_VMC_CON0, 1, 0xFF, 0);
}
+static u32 pmic_get_vrf12_vol(void)
+{
+ return (pwrap_read_field(PMIC_LDO_VRF12_CON0, 0x3, 0) &
+ pwrap_read_field(PMIC_LDO_VRF12_OP_EN, 0x3, 0)) ? 1200000 : 0;
+}
+
+static void pmic_enable_vrf12(void)
+{
+ pwrap_write_field(PMIC_LDO_VRF12_CON0, 1, 0x3, 0);
+ pwrap_write_field(PMIC_LDO_VRF12_OP_EN, 1, 0x3, 0);
+}
+
+static u32 pmic_get_vcn33_vol(void)
+{
+ u32 ret;
+ u16 vol_reg;
+
+ vol_reg = pwrap_read_field(PMIC_VCN33_ANA_CON0, 0x3, 8);
+
+ switch (vol_reg) {
+ case 0x1:
+ ret = 3300000;
+ break;
+ case 0x2:
+ ret = 3400000;
+ break;
+ case 0x3:
+ ret = 3500000;
+ break;
+ default:
+ printk(BIOS_ERR, "ERROR[%s] VCN33 read fail: %d\n", __func__, vol_reg);
+ ret = 0;
+ break;
+ }
+ return ret;
+}
+
+static void pmic_set_vcn33_vol(u32 vcn33_uv)
+{
+ u16 val = 0;
+
+ switch (vcn33_uv) {
+ case 3300000:
+ val = 0x1;
+ break;
+ case 3400000:
+ val = 0x2;
+ break;
+ case 3500000:
+ val = 0x3;
+ break;
+ default:
+ die("ERROR[%s]: VCN33 voltage %u is not support.\n", __func__, vcn33_uv);
+ return;
+ }
+
+ pwrap_write_field(PMIC_VCN33_ANA_CON0, val, 0x3, 8);
+
+ /* Force SW to turn on */
+ pwrap_write_field(PMIC_LDO_VCN33_CON0_0, 1, 0x1, 0);
+}
+
static void pmic_wdt_set(void)
{
/* [5]=1, RG_WDTRSTB_DEB */
@@ -824,6 +886,13 @@ void mt6366_set_voltage(enum mt6366_regulator_id id, u32 voltage_uv)
case MT6366_VSRAM_PROC12:
pmic_set_vsram_proc12_vol(voltage_uv);
break;
+ case MT6366_VRF12:
+ /* VRF12 only provides 1.2V, so we just need to enable it */
+ pmic_enable_vrf12();
+ break;
+ case MT6366_VCN33:
+ pmic_set_vcn33_vol(voltage_uv);
+ break;
default:
printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id);
break;
@@ -847,6 +916,10 @@ u32 mt6366_get_voltage(enum mt6366_regulator_id id)
return pmic_get_vproc12_vol();
case MT6366_VSRAM_PROC12:
return pmic_get_vsram_proc12_vol();
+ case MT6366_VRF12:
+ return pmic_get_vrf12_vol();
+ case MT6366_VCN33:
+ return pmic_get_vcn33_vol();
default:
printk(BIOS_ERR, "%s: PMIC %d is not supported\n", __func__, id);
break;