summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorIonela Voinescu <ionela.voinescu@imgtec.com>2015-07-24 15:00:20 +0100
committerMartin Roth <martinroth@google.com>2015-12-29 18:02:15 +0100
commite7a336ac29b1ef5aaa1b0aa4926ed75829b491b1 (patch)
tree7dbee4b28e86cf01de98498bf06fb4c4f3e92fae /src/soc
parentc2b51085ca4aa3427ad788e9b402e0da46a0b1a6 (diff)
mips: add coherency argument to identity mapping
In order for a U-boot payload to work properly the soc_registers region (device registers) needs to be mapped as uncached. Therefore, add a coherency argument to the identity mapping funcion which will establish the type of mapping. Change-Id: I26fc546378acda4f4f8f4757fbc0adb03ac7db9f Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com> Reviewed-on: https://review.coreboot.org/12769 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/imgtec/pistachio/bootblock.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/imgtec/pistachio/bootblock.c b/src/soc/imgtec/pistachio/bootblock.c
index 5d38278942..eceb814447 100644
--- a/src/soc/imgtec/pistachio/bootblock.c
+++ b/src/soc/imgtec/pistachio/bootblock.c
@@ -54,7 +54,7 @@ static void bootblock_mmu_init(void)
dram_base += null_guard_size;
dram_size -= null_guard_size;
}
-
- assert(!identity_map(dram_base, dram_size));
- assert(!identity_map((uint32_t)_sram, _sram_size));
+ assert(!identity_map((uint32_t)_sram, _sram_size,
+ C0_ENTRYLO_COHERENCY_WB));
+ assert(!identity_map(dram_base, dram_size, C0_ENTRYLO_COHERENCY_WB));
}