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authorFurquan Shaikh <furquan@chromium.org>2016-11-29 22:07:42 -0800
committerFurquan Shaikh <furquan@google.com>2016-12-23 04:54:55 +0100
commitc2973d196d1224a1253478dc29d5f8fa004eaab8 (patch)
tree2377f357ee09f147b3f413949057306ca1839bab /src/soc
parent42cfdf5184b3e94805958a3368f2e049c09119ac (diff)
spi: Get rid of SPI_ATOMIC_SEQUENCING
SPI_ATOMIC_SEQUENCING was added to accomodate spi flash controllers with the ability to perform tx and rx of flash command and response at the same time. Instead of introducing this notion at SPI flash driver layer, clean up the interface to SPI used by flash. Flash uses a command-response kind of communication. Thus, even though SPI is duplex, flash command needs to be sent out on SPI bus and then flash response should be received on the bus. Some specialized x86 flash controllers are capable of handling command and response in a single transaction. In order to support all the varied cases: 1. Add spi_xfer_vector that takes as input a vector of SPI operations and calls back into SPI controller driver to process these operations. 2. In order to accomodate flash command-response model, use two vectors while calling into spi_xfer_vector -- one with dout set to non-NULL(command) and other with din set to non-NULL(response). 3. For specialized SPI flash controllers combine two successive vectors if the transactions look like a command-response pair. 4. Provide helper functions for common cases like supporting only 2 vectors at a time, supporting n vectors at a time, default vector operation to cycle through all SPI op vectors one by one. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully Change-Id: I4c9e78c585ad95c40c0d5af078ff8251da286236 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17681 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/broadcom/cygnus/spi.c1
-rw-r--r--src/soc/imgtec/pistachio/Kconfig1
-rw-r--r--src/soc/imgtec/pistachio/spi.c7
-rw-r--r--src/soc/intel/baytrail/spi.c1
-rw-r--r--src/soc/intel/braswell/spi.c1
-rw-r--r--src/soc/intel/broadwell/spi.c1
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/spi.c1
-rw-r--r--src/soc/mediatek/mt8173/Kconfig1
-rw-r--r--src/soc/mediatek/mt8173/spi.c1
-rw-r--r--src/soc/qualcomm/ipq40xx/Kconfig1
-rw-r--r--src/soc/qualcomm/ipq806x/Kconfig1
12 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/broadcom/cygnus/spi.c b/src/soc/broadcom/cygnus/spi.c
index e597efced9..f03d453307 100644
--- a/src/soc/broadcom/cygnus/spi.c
+++ b/src/soc/broadcom/cygnus/spi.c
@@ -279,6 +279,7 @@ static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
.xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_xfer_two_vectors,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig
index da33cc5c96..1ce488c35b 100644
--- a/src/soc/imgtec/pistachio/Kconfig
+++ b/src/soc/imgtec/pistachio/Kconfig
@@ -22,7 +22,6 @@ config CPU_IMGTEC_PISTACHIO
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
- select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
select HAVE_HARD_RESET
select UART_OVERRIDE_REFCLK
diff --git a/src/soc/imgtec/pistachio/spi.c b/src/soc/imgtec/pistachio/spi.c
index e956e46f7a..2b706f0980 100644
--- a/src/soc/imgtec/pistachio/spi.c
+++ b/src/soc/imgtec/pistachio/spi.c
@@ -22,10 +22,6 @@
#include <string.h>
#include <timer.h>
-#if !CONFIG_SPI_ATOMIC_SEQUENCING
-#error "Unsupported SPI driver API"
-#endif
-
/* Imgtec controller uses 16 bit packet length. */
#define IMGTEC_SPI_MAX_TRANSFER_SIZE ((1 << 16) - 1)
@@ -496,7 +492,7 @@ static int do_spi_xfer(const struct spi_slave *slave, const void *dout,
}
static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin)
+ size_t bytesout, void *din, size_t bytesin)
{
unsigned int in_sz, out_sz;
int ret;
@@ -541,6 +537,7 @@ static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
.xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_xfer_two_vectors,
};
/* Set up communications parameters for a SPI slave. */
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index 0f7b0c6ced..639954bcfe 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -612,6 +612,7 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
static const struct spi_ctrlr spi_ctrlr = {
.xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_xfer_two_vectors,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c
index 2a0ddf8179..86b335107b 100644
--- a/src/soc/intel/braswell/spi.c
+++ b/src/soc/intel/braswell/spi.c
@@ -596,6 +596,7 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
static const struct spi_ctrlr spi_ctrlr = {
.xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_xfer_two_vectors,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index d2ae94314d..7a7eaf7178 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -646,6 +646,7 @@ int spi_flash_protect(u32 start, u32 size)
static const struct spi_ctrlr spi_ctrlr = {
.xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_xfer_two_vectors,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index 997bd138ae..dee7440ef6 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -592,6 +592,7 @@ spi_xfer_exit:
static const struct spi_ctrlr spi_ctrlr = {
.xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_xfer_two_vectors,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c
index 5848966f38..a6b6f3541a 100644
--- a/src/soc/intel/fsp_broadwell_de/spi.c
+++ b/src/soc/intel/fsp_broadwell_de/spi.c
@@ -609,6 +609,7 @@ spi_xfer_exit:
static const struct spi_ctrlr spi_ctrlr = {
.xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_xfer_two_vectors,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/mediatek/mt8173/Kconfig b/src/soc/mediatek/mt8173/Kconfig
index ec3481e366..7a6ad871cb 100644
--- a/src/soc/mediatek/mt8173/Kconfig
+++ b/src/soc/mediatek/mt8173/Kconfig
@@ -9,7 +9,6 @@ config SOC_MEDIATEK_MT8173
select ARM64_USE_ARM_TRUSTED_FIRMWARE
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
- select SPI_ATOMIC_SEQUENCING if SPI_FLASH
select HAVE_MONOTONIC_TIMER
select GENERIC_UDELAY
select GENERIC_GPIO_LIB
diff --git a/src/soc/mediatek/mt8173/spi.c b/src/soc/mediatek/mt8173/spi.c
index 53d5b8ce15..415764a1b6 100644
--- a/src/soc/mediatek/mt8173/spi.c
+++ b/src/soc/mediatek/mt8173/spi.c
@@ -293,6 +293,7 @@ static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
.xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_xfer_two_vectors,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
index f7386227d0..05f29e4be9 100644
--- a/src/soc/qualcomm/ipq40xx/Kconfig
+++ b/src/soc/qualcomm/ipq40xx/Kconfig
@@ -7,7 +7,6 @@ config SOC_QC_IPQ40XX
select ARCH_RAMSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
- select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
select HAVE_MONOTONIC_TIMER
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index 7ba5df5794..32b61bc53a 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -7,7 +7,6 @@ config SOC_QC_IPQ806X
select ARCH_RAMSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
- select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
if SOC_QC_IPQ806X