diff options
author | Shelley Chen <shchen@chromium.org> | 2017-04-27 16:07:45 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-05-01 00:45:24 +0200 |
commit | b6595f1b08e37d0ced800d93f017f66b570fcd38 (patch) | |
tree | 679e9c5fb2932ade2b8e0f34215575a962857cf4 /src/soc | |
parent | cc558e622356aca0fd8bae6bbfbb3bacc88ec744 (diff) |
soc/intel/skylake: Add ID for Fizz i7
Bug=b:35775024
BRANCH=None
TEST=boot up successfully to kernel on Fizz i7 sku
Change-Id: Iccf9fbef1333f3fea78091b679c2676411559987
Signed-off-by: Shelley Chen <shchen@chromium.org>
Reviewed-on: https://review.coreboot.org/19486
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/skylake/include/soc/pch.h | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/lpc.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/include/soc/pch.h b/src/soc/intel/skylake/include/soc/pch.h index d984b8deba..d8e5b96491 100644 --- a/src/soc/intel/skylake/include/soc/pch.h +++ b/src/soc/intel/skylake/include/soc/pch.h @@ -31,6 +31,7 @@ #define PCH_SPT_H_QM170 0xa14d #define PCH_KBL_LP_Y_PREMIUM_HDCP22 0x9d4b #define PCH_KBL_LP_U_PREMIUM_HDCP22 0x9d4e +#define PCH_LP_SUPER_SKU 0x9d51 #define PCH_KBL_LP_U_PREMIUM 0x9d58 #define PCH_KBL_LP_Y_PREMIUM 0x9d56 diff --git a/src/soc/intel/skylake/lpc.c b/src/soc/intel/skylake/lpc.c index f689e1cb17..3a6564c6c9 100644 --- a/src/soc/intel/skylake/lpc.c +++ b/src/soc/intel/skylake/lpc.c @@ -327,6 +327,7 @@ static const unsigned short pci_device_ids[] = { PCH_KBL_LP_Y_PREMIUM, PCH_KBL_LP_Y_PREMIUM_HDCP22, PCH_KBL_LP_U_PREMIUM_HDCP22, + PCH_LP_SUPER_SKU, 0 }; |