diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2016-08-11 14:04:10 -0500 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2016-08-15 21:00:25 +0200 |
| commit | a83bbf58541cf41ea7a97dedbc8c02dffa59e86d (patch) | |
| tree | 78d1a7aaecbd4ad734bc17c22ddf090193e91695 /src/soc | |
| parent | 3cef11753dbe968d6088821f05f33f042cae4260 (diff) | |
Kconfig: separate memory mapped boot device from SPI
Make the indication of the boot device being memory mapped
separate from SPI. However, retain the same defaults that
previously existed.
BUG=chrome-os-partner:56151
Change-Id: Ibdd7c8754f9bf560a878136b1f55238e2c2549d3
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16193
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/apollolake/romstage.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 8f17fddd69..067d654b25 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -160,7 +160,8 @@ void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd) * state machine transition to next boot state, so that it can function * as designed. */ - mupd->FspmConfig.SkipCseRbp = IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED); + mupd->FspmConfig.SkipCseRbp = + IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED); } __attribute__ ((weak)) |