diff options
| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2020-08-06 22:45:14 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-08-18 08:46:33 +0000 |
| commit | 7749c34a11029c3cba6dbd280cd19852c57a304f (patch) | |
| tree | e98af688b997571e610508290d821dc10f5fd085 /src/soc | |
| parent | 7bcef3a40699df06e54a2c835412c2c92d14e386 (diff) | |
soc/intel/jasperlake: Configure IPU based on devicetree
FSP enables IPU (Imaging Processing Unit) by default even if its
disabled in devicetree. We need to fill FSP upd based on the device
enablement in devicetree.
BUG=None
BRANCH=None
TEST=IPU is disabled and doesn't show in lspci.
Change-Id: I0f9a40e85427fd88bb12a40770ecf7b939b1d8cd
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/jasperlake/romstage/fsp_params.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c index 809ae805bf..dccdebf304 100644 --- a/src/soc/intel/jasperlake/romstage/fsp_params.c +++ b/src/soc/intel/jasperlake/romstage/fsp_params.c @@ -66,10 +66,13 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->CpuTraceHubMode = config->TraceHubMode; } + /* IPU configuration */ + dev = pcidev_path_on_root(SA_DEVFN_IPU); + m_cfg->SaIpuEnable = is_dev_enabled(dev); + /* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */ m_cfg->VmxEnable = CONFIG(ENABLE_VMX); - /* Enable SMBus controller based on config */ m_cfg->SmbusEnable = config->SmbusEnable; |