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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-14 01:55:18 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-02-16 08:08:01 +0000
commit6d085446feb3d47154ff9641b66f583ddc218d40 (patch)
tree1b263fdc8994ccae6e4690f4ff98ddfda9be788b /src/soc
parentc4b3903361c4d13242850e99cc382e101f70dccb (diff)
soc/intel/baytrail,braswell: Drop aliases on MMCONF_BASE_ADDRESS
Add MMCONF_BUS_NUMBER=256 to match previous allocation. Change-Id: I01a86481e392a9347afdc2860b58617b20c4f05a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50663 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/baytrail/Kconfig4
-rw-r--r--src/soc/intel/baytrail/acpi.c2
-rw-r--r--src/soc/intel/baytrail/acpi/southcluster.asl4
-rw-r--r--src/soc/intel/baytrail/include/soc/iomap.h4
-rw-r--r--src/soc/intel/braswell/Kconfig4
-rw-r--r--src/soc/intel/braswell/acpi.c2
-rw-r--r--src/soc/intel/braswell/acpi/southcluster.asl4
-rw-r--r--src/soc/intel/braswell/include/soc/iomap.h4
8 files changed, 14 insertions, 14 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 6d91d5850e..8811b38cf9 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -44,6 +44,10 @@ config VBOOT
config MMCONF_BASE_ADDRESS
default 0xe0000000
+config MMCONF_BUS_NUMBER
+ int
+ default 256
+
config MAX_CPUS
int
default 4
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c
index 153ef04073..682f9b4a43 100644
--- a/src/soc/intel/baytrail/acpi.c
+++ b/src/soc/intel/baytrail/acpi.c
@@ -97,7 +97,7 @@ int acpi_sci_irq(void)
unsigned long acpi_fill_mcfg(unsigned long current)
{
current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
- MCFG_BASE_ADDRESS, 0, 0, 255);
+ CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
return current;
}
diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl
index ab273448ca..5f20463c2a 100644
--- a/src/soc/intel/baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/baytrail/acpi/southcluster.asl
@@ -198,7 +198,7 @@ Device (PDRC)
Name (PDRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE)
- Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE)
+ Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_MMCONF_LENGTH)
Memory32Fixed(ReadWrite, PMC_BASE_ADDRESS, PMC_BASE_SIZE)
Memory32Fixed(ReadWrite, ILB_BASE_ADDRESS, ILB_BASE_SIZE)
Memory32Fixed(ReadWrite, SPI_BASE_ADDRESS, SPI_BASE_SIZE)
@@ -247,7 +247,7 @@ Device (IOSF)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RBAR._BAS, RBAS)
- Store (Add (MCFG_BASE_ADDRESS, 0xD0), RBAS)
+ Store (Add (CONFIG_MMCONF_BASE_ADDRESS, 0xD0), RBAS)
Return (^RBUF)
}
}
diff --git a/src/soc/intel/baytrail/include/soc/iomap.h b/src/soc/intel/baytrail/include/soc/iomap.h
index 3046386be0..7b635e752c 100644
--- a/src/soc/intel/baytrail/include/soc/iomap.h
+++ b/src/soc/intel/baytrail/include/soc/iomap.h
@@ -7,10 +7,6 @@
* Memory Mapped IO bases.
*/
-/* PCI Configuration Space */
-#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
-#define MCFG_BASE_SIZE 0x10000000
-
/* Transactions in this range will abort */
#define ABORT_BASE_ADDRESS 0xfeb00000
#define ABORT_BASE_SIZE 0x00100000
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index fcf07fafab..0e1b6db34f 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -59,6 +59,10 @@ config VBOOT
config MMCONF_BASE_ADDRESS
default 0xe0000000
+config MMCONF_BUS_NUMBER
+ int
+ default 256
+
config MAX_CPUS
int
default 4
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index dbb883503f..819990a459 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -107,7 +107,7 @@ int acpi_sci_irq(void)
unsigned long acpi_fill_mcfg(unsigned long current)
{
current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
- MCFG_BASE_ADDRESS, 0, 0, 255);
+ CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
return current;
}
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl
index 64bff1227f..01d1bc076d 100644
--- a/src/soc/intel/braswell/acpi/southcluster.asl
+++ b/src/soc/intel/braswell/acpi/southcluster.asl
@@ -197,7 +197,7 @@ Device (PDRC)
Name (PDRS, ResourceTemplate() {
Memory32Fixed(ReadWrite, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE)
- Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE)
+ Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_MMCONF_LENGTH)
Memory32Fixed(ReadWrite, PMC_BASE_ADDRESS, PMC_BASE_SIZE)
Memory32Fixed(ReadWrite, ILB_BASE_ADDRESS, ILB_BASE_SIZE)
Memory32Fixed(ReadWrite, SPI_BASE_ADDRESS, SPI_BASE_SIZE)
@@ -246,7 +246,7 @@ Device (IOSF)
Method (_CRS)
{
CreateDwordField (^RBUF, ^RBAR._BAS, RBAS)
- Store (Add (MCFG_BASE_ADDRESS, 0xD0), RBAS)
+ Store (Add (CONFIG_MMCONF_BASE_ADDRESS, 0xD0), RBAS)
Return (^RBUF)
}
}
diff --git a/src/soc/intel/braswell/include/soc/iomap.h b/src/soc/intel/braswell/include/soc/iomap.h
index e9907ab939..efa44a458a 100644
--- a/src/soc/intel/braswell/include/soc/iomap.h
+++ b/src/soc/intel/braswell/include/soc/iomap.h
@@ -7,10 +7,6 @@
* Memory Mapped IO bases.
*/
-/* PCI Configuration Space */
-#define MCFG_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS
-#define MCFG_BASE_SIZE 0x10000000
-
/* Transactions in this range will abort */
#define ABORT_BASE_ADDRESS 0xfeb00000
#define ABORT_BASE_SIZE 0x00100000