summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorPatrick Georgi <pgeorgi@chromium.org>2015-05-05 22:27:25 +0200
committerPatrick Georgi <pgeorgi@google.com>2015-05-05 22:49:18 +0200
commit26e24cc12de487c8fe350925147cb3442b49c240 (patch)
treeb8b28556d6917d5cd6ae5fee1cd5991252f478d0 /src/soc
parentf4f028790a492120ce9e7b3292a17664a8c7613d (diff)
3rdparty: move to 3rdparty/blobs
There's now room for other repositories under 3rdparty. Change-Id: I51b02d8bf46b5b9f3f8a59341090346dca7fa355 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10109 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/baytrail/Kconfig8
-rw-r--r--src/soc/intel/baytrail/microcode/microcode_blob.c2
-rw-r--r--src/soc/intel/broadwell/Kconfig6
-rw-r--r--src/soc/intel/broadwell/microcode/microcode_blob.c2
-rw-r--r--src/soc/nvidia/tegra132/Kconfig2
-rw-r--r--src/soc/qualcomm/ipq806x/Kconfig2
-rw-r--r--src/soc/qualcomm/ipq806x/Makefile.inc2
-rw-r--r--src/soc/samsung/exynos5250/Makefile.inc2
-rw-r--r--src/soc/samsung/exynos5420/Makefile.inc2
9 files changed, 14 insertions, 14 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index 13f60bdbd1..85631fcc29 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -75,7 +75,7 @@ if HAVE_MRC
config MRC_FILE
string "Intel memory refeference code path and filename"
- default "blobs/northbridge/intel/sandybridge/systemagent-r6.bin"
+ default "3rdparty/blobs/northbridge/intel/sandybridge/systemagent-r6.bin"
help
The path and filename of the file to use as System Agent
binary. Note that this points to the sandybridge binary file
@@ -174,7 +174,7 @@ config HAVE_ME_BIN
help
The Intel processor in the selected system requires a special firmware
for an integrated controller called Management Engine (ME). The ME
- firmware might be provided in coreboot's blobs repository. If
+ firmware might be provided in coreboot's 3rdparty/blobs repository. If
not and if you don't have the firmware elsewhere, you can still
build coreboot without it. In this case however, you'll have to make
sure that you don't overwrite your ME firmware on your flash ROM.
@@ -182,7 +182,7 @@ config HAVE_ME_BIN
config ME_BIN_PATH
string "Path to management engine firmware"
depends on HAVE_ME_BIN
- default "blobs/mainboard/$(MAINBOARDDIR)/me.bin"
+ default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin"
config HAVE_IFD_BIN
bool
@@ -223,7 +223,7 @@ config IFD_PLATFORM_SECTION
config IFD_BIN_PATH
string "Path to intel firmware descriptor"
depends on !BUILD_WITH_FAKE_IFD
- default "blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
+ default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
config HAVE_REFCODE_BLOB
depends on ARCH_X86
diff --git a/src/soc/intel/baytrail/microcode/microcode_blob.c b/src/soc/intel/baytrail/microcode/microcode_blob.c
index a651f978fd..a69990f0b9 100644
--- a/src/soc/intel/baytrail/microcode/microcode_blob.c
+++ b/src/soc/intel/baytrail/microcode/microcode_blob.c
@@ -1,3 +1,3 @@
unsigned microcode[] = {
-#include "../../../../../blobs/soc/intel/baytrail/microcode_blob.h"
+#include "../../../../../3rdparty/blobs/soc/intel/baytrail/microcode_blob.h"
};
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index d3c7ff6594..4a71aa7db9 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -211,7 +211,7 @@ config HAVE_ME_BIN
help
The Intel processor in the selected system requires a special firmware
for an integrated controller called Management Engine (ME). The ME
- firmware might be provided in coreboot's blobs repository. If
+ firmware might be provided in coreboot's 3rdparty/blobs repository. If
not and if you don't have the firmware elsewhere, you can still
build coreboot without it. In this case however, you'll have to make
sure that you don't overwrite your ME firmware on your flash ROM.
@@ -219,7 +219,7 @@ config HAVE_ME_BIN
config ME_BIN_PATH
string "Path to management engine firmware"
depends on HAVE_ME_BIN
- default "blobs/mainboard/$(MAINBOARDDIR)/me.bin"
+ default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin"
config HAVE_IFD_BIN
bool "Use Intel Firmware Descriptor from existing binary"
@@ -260,7 +260,7 @@ config IFD_PLATFORM_SECTION
config IFD_BIN_PATH
string "Path to intel firmware descriptor"
depends on !BUILD_WITH_FAKE_IFD
- default "blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
+ default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin"
config LOCK_MANAGEMENT_ENGINE
bool "Lock Management Engine section"
diff --git a/src/soc/intel/broadwell/microcode/microcode_blob.c b/src/soc/intel/broadwell/microcode/microcode_blob.c
index 93a6aa86e4..4f06cb2266 100644
--- a/src/soc/intel/broadwell/microcode/microcode_blob.c
+++ b/src/soc/intel/broadwell/microcode/microcode_blob.c
@@ -18,6 +18,6 @@
*/
unsigned microcode[] = {
-#include "../../../../../blobs/soc/intel/broadwell/microcode_blob.h"
+#include "../../../../../3rdparty/blobs/soc/intel/broadwell/microcode_blob.h"
};
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index af8f61751d..ee0a0ef8d9 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -49,7 +49,7 @@ config MAX_CPUS
config MTS_DIRECTORY
string "Directory where MTS microcode files are located"
- default "blobs/cpu/nvidia/tegra132/current/prod"
+ default "3rdparty/blobs/cpu/nvidia/tegra132/current/prod"
help
Path to directory where MTS microcode files are located.
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index c1c66bb8c2..413270863d 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -30,7 +30,7 @@ config MBN_ENCAPSULATION
config SBL_BLOB
depends on USE_BLOBS
string "file name of the Qualcomm SBL blob"
- default "blobs/cpu/qualcomm/ipq806x/uber-sbl.mbn"
+ default "3rdparty/blobs/cpu/qualcomm/ipq806x/uber-sbl.mbn"
help
The path and filename of the binary blob containing
ipq806x early initialization code, as supplied by the
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index f3b0b200a2..4910d950f7 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -83,7 +83,7 @@ CPPFLAGS_common += -Isrc/soc/qualcomm/ipq806x/include
mbn-files := cdt.mbn ddr.mbn rpm.mbn tz.mbn
# Location of the binary blobs
-mbn-root := blobs/cpu/qualcomm/ipq806x
+mbn-root := 3rdparty/blobs/cpu/qualcomm/ipq806x
# Create make variables to aid cbfs-files-handler in processing the blobs (add
# them all as raw binaries at the root level).
diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc
index c09ecb4081..9f49134334 100644
--- a/src/soc/samsung/exynos5250/Makefile.inc
+++ b/src/soc/samsung/exynos5250/Makefile.inc
@@ -52,6 +52,6 @@ $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
util/exynos/fixed_cksum.py $< $<.cksum 32768
- cat blobs/cpu/samsung/exynos5250/bl1.bin $<.cksum > $@
+ cat 3rdparty/blobs/cpu/samsung/exynos5250/bl1.bin $<.cksum > $@
endif
diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc
index 8d90ba07ce..753e6d0a86 100644
--- a/src/soc/samsung/exynos5420/Makefile.inc
+++ b/src/soc/samsung/exynos5420/Makefile.inc
@@ -54,6 +54,6 @@ $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
util/exynos/variable_cksum.py $< $<.cksum
- cat blobs/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@
+ cat 3rdparty/blobs/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@
endif