diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-07-03 10:20:40 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-07-03 09:11:36 +0000 |
| commit | 2020cbb6ed45a282d1236dca91dce86d03360132 (patch) | |
| tree | 9c3617c2065a9580690590631243271fccc731e9 /src/soc | |
| parent | 19476c34b0ce20c966d0461ec4d4bb689fce8f35 (diff) | |
soc/intel/skylake: Add Kabylake-R microcode update files
This also corrects some CPU naming in comments.
Change-Id: I8b9fc3ba0d6dc6e0001b40518aae2d26c1184dc8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34000
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 25dce05226..20fba29116 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -84,13 +84,15 @@ postcar-y += uart.c ifeq ($(CONFIG_SKYLAKE_SOC_PCH_H),y) # Skylake H Q0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5e-03 -# Kabylake HB0 +# Kabylake H B0 S0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09 else # Skylake D0 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-4e-03 -# Kabylake H0, Y0 +# Kabylake H0, J0, J1 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-09 +# Kabylake Y0 +cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a endif # Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8) # since those are probably pre-release samples. |