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authorFurquan Shaikh <furquan@google.com>2016-04-15 10:34:31 -0700
committerFurquan Shaikh <furquan@google.com>2016-04-18 05:20:25 +0200
commit043976065b006b42a9ec47cf34605eaec4815c6f (patch)
tree356f72939ab9abda420eaf31021ea75594b116a2 /src/soc
parentee862ffc44ce8f5b4f3fcea5e78686f35f044f61 (diff)
soc/intel/apollolake: Do not re-save BIST result
BIST result is already stored by arch/x86/bootblock_ctr0.S in mm0. Also, eax does not contain BIST result by the time control reaches bootblock_pre_c_entry. bootblock_crt0.S saves timestamp in mm2 which was being overwritten here. Thus, remove the saving of BIST result from SoC code. Change-Id: I65444689cf104c59c84574019f5daf82aab10bc7 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14381 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/apollolake/bootblock/cache_as_ram.S4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/apollolake/bootblock/cache_as_ram.S b/src/soc/intel/apollolake/bootblock/cache_as_ram.S
index 3c7bd299c2..9d2bba01e8 100644
--- a/src/soc/intel/apollolake/bootblock/cache_as_ram.S
+++ b/src/soc/intel/apollolake/bootblock/cache_as_ram.S
@@ -25,10 +25,6 @@
.global bootblock_pre_c_entry
bootblock_pre_c_entry:
- /*
- * eax: BIST value
- */
- movd %eax, %mm2
.global cache_as_ram
cache_as_ram: