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authorMartin Roth <martin@coreboot.org>2020-11-09 13:13:27 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-11-16 12:09:58 +0000
commit0639bff5bac84975258f4059eaf130582e1aee94 (patch)
treeec34d0da7473a08d5605239c74c85af7965e601f /src/soc
parenta0e5046a08d991cafe34d9d91baf4dc82f4d86e8 (diff)
src: Update some incorrect config options in comments
This is a trivial patch to fix some comments that were generating notes in the kconfig lint test. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: I26a95f17e82910f50c62215be5c29780fe98e29a Reviewed-on: https://review.coreboot.org/c/coreboot/+/47366 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/braswell/memmap.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c
index 6cfce43a81..4a791ef181 100644
--- a/src/soc/intel/braswell/memmap.c
+++ b/src/soc/intel/braswell/memmap.c
@@ -27,11 +27,11 @@ void *cbmem_top_chipset(void)
/*
* +-------------------------+ Top of RAM (aligned)
* | System Management Mode |
- * | code and data | Length: CONFIG_TSEG_SIZE
+ * | code and data | Length: CONFIG_SMM_TSEG_SIZE
* | (TSEG) |
* +-------------------------+ SMM base (aligned)
* | |
- * | Chipset Reserved Memory | Length: Multiple of CONFIG_TSEG_SIZE
+ * | Chipset Reserved Memory | Length: Multiple of CONFIG_SMM_TSEG_SIZE
* | |
* +-------------------------+ top_of_ram (aligned)
* | |