diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-02-18 19:00:32 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-02-24 13:01:03 +0000 |
| commit | e9f86c1016bc71eb0d9f7bb4b5f3ce36c56f100b (patch) | |
| tree | 358919990579951ab91d367aa68d141a63c5a48d /src/soc | |
| parent | 22f8ee0f0ee8383238cd92cec0b6e42ed0651ee8 (diff) | |
soc/amd/common/block/include/amdblocks: Fix typos
Change-Id: I8363816a51c342935668545a8b39acce96ce4b2c
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38980
Reviewed-by: Jacob Garber <jgarber1@ualberta.ca>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/gpio_banks.h | 2 | ||||
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/lpc.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h index 2206e35ff2..8600e64fcc 100644 --- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h +++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h @@ -303,7 +303,7 @@ uintptr_t gpio_get_address(gpio_t gpio_num); void program_gpios(const struct soc_amd_gpio *gpio_list_ptr, size_t size); /* Return the interrupt status and clear if set. */ int gpio_interrupt_status(gpio_t gpio); -/* Implemented by soc, provides table of avaialable GPIO mapping to Gevents */ +/* Implemented by soc, provides table of available GPIO mapping to Gevents */ void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items); /* May be implemented by soc to handle special cases */ void soc_gpio_hook(uint8_t gpio, uint8_t mux); diff --git a/src/soc/amd/common/block/include/amdblocks/lpc.h b/src/soc/amd/common/block/include/amdblocks/lpc.h index 2874c18879..2f8cd971f1 100644 --- a/src/soc/amd/common/block/include/amdblocks/lpc.h +++ b/src/soc/amd/common/block/include/amdblocks/lpc.h @@ -103,7 +103,7 @@ #define LPC_MEM_PORT0 0x60 /* Register 0x64 is 32-bit, composed by two 16-bit sub-registers. - For ease of access, each sub-register is declared separetely. */ + For ease of access, each sub-register is declared separately. */ #define LPC_WIDEIO_GENERIC_PORT 0x64 #define LPC_WIDEIO1_GENERIC_PORT 0x66 #define ROM_ADDRESS_RANGE1_START 0x68 |