diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2017-09-15 14:32:13 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-20 23:54:14 +0000 |
| commit | b19e33f05ca43a40babe4f081bf6fb0ff53f5d4f (patch) | |
| tree | df02f5666ffdb0da6951d8b5496d0e95813c939f /src/soc | |
| parent | 64b4bddcbc2156e9a410f07e14e58cf01d579fdb (diff) | |
soc/intel/braswell: refactor rtc failure checking
In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to pmutil.c and add a helper
function to determine if failure occurred.
BUG=b:63054105
Change-Id: Ic4bf99dc3a26fbc3bd508e484963b9298ef1b24b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/braswell/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/intel/braswell/include/soc/pm.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/braswell/pmutil.c | 22 | ||||
| -rw-r--r-- | src/soc/intel/braswell/southcluster.c | 19 |
4 files changed, 27 insertions, 18 deletions
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 88d024243b..8147b72cb3 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -12,6 +12,7 @@ romstage-y += gpio_support.c romstage-y += iosf.c romstage-y += lpc_init.c romstage-y += memmap.c +romstage-y += pmutil.c romstage-y += tsc_freq.c ramstage-y += acpi.c diff --git a/src/soc/intel/braswell/include/soc/pm.h b/src/soc/intel/braswell/include/soc/pm.h index 5f809edecd..5ac29f4e30 100644 --- a/src/soc/intel/braswell/include/soc/pm.h +++ b/src/soc/intel/braswell/include/soc/pm.h @@ -249,6 +249,9 @@ void southcluster_log_state(void); static inline void southcluster_log_state(void) {} #endif +/* Return non-zero when RTC failure happened. */ +int rtc_failure(void); + #endif /* !defined(__ASSEMBLER__) && !defined(__ACPI__) */ #endif /* _SOC_PM_H_ */ diff --git a/src/soc/intel/braswell/pmutil.c b/src/soc/intel/braswell/pmutil.c index 018915c92b..4154522d4e 100644 --- a/src/soc/intel/braswell/pmutil.c +++ b/src/soc/intel/braswell/pmutil.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <cbmem.h> #include <console/console.h> #include <rules.h> #include <soc/iomap.h> @@ -23,7 +24,7 @@ #include <soc/pm.h> #include <stdint.h> -#if ENV_SMM +#if defined(__SIMPLE_DEVICE__) static const device_t pcu_dev = PCI_DEV(0, PCU_DEV, 0); @@ -354,3 +355,22 @@ void clear_pmc_status(void) write32((void *)(PMC_BASE_ADDRESS + GEN_PMCON1), gen_pmcon1 & ~RPS); write32((void *)(PMC_BASE_ADDRESS + PRSTS), prsts); } + +int rtc_failure(void) +{ + uint32_t gen_pmcon1; + int rtc_fail; + struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); + + if (ps != NULL) + gen_pmcon1 = ps->gen_pmcon1; + else + gen_pmcon1 = read32((u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1)); + + rtc_fail = !!(gen_pmcon1 & RPS); + + if (rtc_fail) + printk(BIOS_DEBUG, "RTC failure.\n"); + + return rtc_fail; +} diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c index e03312386a..6eb61c72af 100644 --- a/src/soc/intel/braswell/southcluster.c +++ b/src/soc/intel/braswell/southcluster.c @@ -149,23 +149,8 @@ static void sc_read_resources(device_t dev) static void sc_rtc_init(void) { - uint32_t gen_pmcon1; - int rtc_fail; - struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE); - - printk(BIOS_SPEW, "%s/%s\n", - __FILE__, __func__); - if (ps != NULL) - gen_pmcon1 = ps->gen_pmcon1; - else - gen_pmcon1 = read32((void *)(PMC_BASE_ADDRESS + GEN_PMCON1)); - - rtc_fail = !!(gen_pmcon1 & RPS); - - if (rtc_fail) - printk(BIOS_DEBUG, "RTC failure.\n"); - - cmos_init(rtc_fail); + printk(BIOS_SPEW, "%s/%s\n", __FILE__, __func__); + cmos_init(rtc_failure()); } static void sc_init(device_t dev) |