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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-03-19 21:04:23 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-06-04 11:22:53 +0200 |
| commit | 580e7223bb617cfa14bf24e48bb39bac47c4e8e0 (patch) | |
| tree | 13d7034347e8497dcbf7699746830727b33084bd /src/soc | |
| parent | 2d2367cd95dc6ab2dd51b1005675e42bab417769 (diff) | |
devicetree: Change scan_bus() prototype in device ops
The input/output value max is no longer used for tracking the
bus enumeration sequence, everything is handled in the context
of devicetree bus objects.
Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8541
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/baytrail/pcie.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c index e4c0654b41..4a050fa55a 100644 --- a/src/soc/intel/baytrail/pcie.c +++ b/src/soc/intel/baytrail/pcie.c @@ -230,7 +230,7 @@ static void byt_pcie_enable(device_t dev) southcluster_enable_dev(dev); } -static unsigned int byt_pciexp_scan_bridge(device_t dev, unsigned int max) +static void byt_pciexp_scan_bridge(device_t dev) { static const struct reg_script wait_for_link_active[] = { REG_PCI_POLL32(LCTL, (1 << 29) , (1 << 29), 50000), @@ -240,7 +240,7 @@ static unsigned int byt_pciexp_scan_bridge(device_t dev, unsigned int max) /* wait for Link Active with 50ms timeout */ reg_script_run_on_dev(dev, wait_for_link_active); - return do_pci_scan_bridge(dev, max, pciexp_scan_bus); + do_pci_scan_bridge(dev, pciexp_scan_bus); } static void pcie_root_set_subsystem(device_t dev, unsigned vid, unsigned did) |