diff options
| author | PH Hsu <ph.hsu@mediatek.com> | 2015-12-16 13:48:10 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-03-15 21:34:43 +0100 |
| commit | 3693d0f94b7ed1fc7ffe131af87622a18630ad28 (patch) | |
| tree | 04d670a10b333ffafe1265ec2eba4130df464953 /src/soc | |
| parent | 00feb3928f130bcf6ddf97a605f1e07cb3c37661 (diff) | |
mediatek/mt8173: Enable 4GB mode
If the system is using 4GB of memory, enable 4GB mode in
the memory controller.
Change-Id: I4d0f8ad8d43ff45dd786f4244b11c0879d2088cd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 94c8b7ad911c93c4325113e7afc009f2f81d2275
Original-Change-Id: Ia3640882a46e695550e679dc70611855b64a560f
Original-Signed-off-by: PH Hsu <ph.hsu@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/331811
Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com>
Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/14088
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/mediatek/mt8173/emi.c | 14 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8173/include/soc/infracfg.h | 4 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8173/include/soc/pericfg.h | 8 |
3 files changed, 26 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8173/emi.c b/src/soc/mediatek/mt8173/emi.c index 1ff4f23f10..9c89134932 100644 --- a/src/soc/mediatek/mt8173/emi.c +++ b/src/soc/mediatek/mt8173/emi.c @@ -25,6 +25,8 @@ #include <soc/dramc_pi_api.h> #include <soc/mt6391.h> #include <soc/pll.h> +#include <soc/infracfg.h> +#include <soc/pericfg.h> struct emi_regs *emi_regs = (void *)EMI_BASE; @@ -163,6 +165,17 @@ size_t sdram_size(void) return ((size_t)1 << (bit_counter - 3)); } +static void init_4GB_mode(void) +{ + if (sdram_size() == (size_t)4 * GiB) { + setbits_le32(&mt8173_pericfg->axi_bus_ctl3, PERISYS_4G_SUPPORT); + setbits_le32(&mt8173_infracfg->infra_misc, DDR_4GB_SUPPORT_EN); + } else { + clrbits_le32(&mt8173_pericfg->axi_bus_ctl3, PERISYS_4G_SUPPORT); + clrbits_le32(&mt8173_infracfg->infra_misc, DDR_4GB_SUPPORT_EN); + } +} + void mt_set_emi(const struct mt8173_sdram_params *sdram_params) { /* voltage info */ @@ -175,4 +188,5 @@ void mt_set_emi(const struct mt8173_sdram_params *sdram_params) init_dram(sdram_params); do_calib(sdram_params); + init_4GB_mode(); } diff --git a/src/soc/mediatek/mt8173/include/soc/infracfg.h b/src/soc/mediatek/mt8173/include/soc/infracfg.h index 12778221b4..60a5209781 100644 --- a/src/soc/mediatek/mt8173/include/soc/infracfg.h +++ b/src/soc/mediatek/mt8173/include/soc/infracfg.h @@ -118,4 +118,8 @@ enum { L2C_SRAM_PDN = 1 << 7 }; +enum { + DDR_4GB_SUPPORT_EN = 1 << 13 +}; + #endif /* __SOC_MEDIATEK_MT8173_INFRACFG_H__ */ diff --git a/src/soc/mediatek/mt8173/include/soc/pericfg.h b/src/soc/mediatek/mt8173/include/soc/pericfg.h index 335db1025e..8e3e477e31 100644 --- a/src/soc/mediatek/mt8173/include/soc/pericfg.h +++ b/src/soc/mediatek/mt8173/include/soc/pericfg.h @@ -89,4 +89,12 @@ enum { PERICFG_UART0_PDN = 1 << 19 }; +/* + * PERI 4GB control + */ + +enum { + PERISYS_4G_SUPPORT = 1 << 15 +}; + #endif /* __SOC_MEDIATEK_MT8173_PERICFG_H__ */ |