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authorJulius Werner <jwerner@chromium.org>2019-05-03 18:29:28 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-06-04 11:23:48 +0000
commitfbec63d15f761e01c934078570acbef779e707ba (patch)
tree64adbebdfed8205b3dfe7b12d490f32759a830b2 /src/soc
parentf36d53c6539ec9e221a5005f00a56960f791a81f (diff)
device_tree: Have absolute paths start with '/'
Currently DT paths are *not* expected to start with '/'. This is not what the spec says (see Devicetree Specification v0.2, 2.2.3 Path Names) and also not what is done by Linux. Change dt_find_node_by_path() to expect paths to start with '/' and add a leading '/' to all DT path strings. Besides the compatibility with the spec this change is also needed to support aliases in the future. This patch was adapted from depthcharge's http://crosreview.com/1252770 Change-Id: Ibdf59ccbb4ead38c6193b630642fd1f1e847dd89 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32865 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/cavium/cn81xx/soc.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c
index 20542e5fa2..efe7d6d204 100644
--- a/src/soc/cavium/cn81xx/soc.c
+++ b/src/soc/cavium/cn81xx/soc.c
@@ -185,7 +185,7 @@ static int dt_platform_fixup(struct device_tree_fixup *fixup,
size_t i;
/* Set the sclk clock rate. */
- dt_node = dt_find_node_by_path(tree, "soc@0/sclk", NULL, NULL, 0);
+ dt_node = dt_find_node_by_path(tree, "/soc@0/sclk", NULL, NULL, 0);
if (dt_node) {
const u32 freq = thunderx_get_io_clock();
printk(BIOS_INFO, "%s: Set SCLK to %u Hz\n", __func__, freq);
@@ -195,7 +195,7 @@ static int dt_platform_fixup(struct device_tree_fixup *fixup,
__func__);
/* Set refclkuaa clock rate. */
- dt_node = dt_find_node_by_path(tree, "soc@0/refclkuaa", NULL,
+ dt_node = dt_find_node_by_path(tree, "/soc@0/refclkuaa", NULL,
NULL, 0);
if (dt_node) {
const u32 freq = uart_platform_refclk();
@@ -211,7 +211,7 @@ static int dt_platform_fixup(struct device_tree_fixup *fixup,
char path[32];
const uint64_t addr = UAAx_PF_BAR0(i);
/* Remove the node */
- snprintf(path, sizeof(path), "soc@0/serial@%llx", addr);
+ snprintf(path, sizeof(path), "/soc@0/serial@%llx", addr);
dt_node = dt_find_node_by_path(tree, path, NULL, NULL, 0);
if (!dt_node || uart_is_enabled(i)) {
printk(BIOS_INFO, "%s: ignoring %s\n", __func__, path);
@@ -227,7 +227,7 @@ static int dt_platform_fixup(struct device_tree_fixup *fixup,
u32 phandle = 0;
const uint64_t addr = PEM_PEMX_PF_BAR0(i);
/* Remove the node */
- snprintf(path, sizeof(path), "soc@0/pci@%llx", addr);
+ snprintf(path, sizeof(path), "/soc@0/pci@%llx", addr);
dt_node = dt_find_node_by_path(tree, path, NULL, NULL, 0);
if (!dt_node || bdk_pcie_is_running(0, i)) {
printk(BIOS_INFO, "%s: ignoring %s\n", __func__, path);
@@ -239,7 +239,7 @@ static int dt_platform_fixup(struct device_tree_fixup *fixup,
list_remove(&dt_node->list_node);
/* Remove phandle to non existing nodes */
- snprintf(path, sizeof(path), "soc@0/smmu0@%llx", SMMU_PF_BAR0);
+ snprintf(path, sizeof(path), "/soc@0/smmu0@%llx", SMMU_PF_BAR0);
dt_node = dt_find_node_by_path(tree, path, NULL, NULL, 0);
if (!dt_node) {
printk(BIOS_ERR, "%s: SMMU entry not found\n",