soc/amd/*/smihandler: Make fch_apmc_smi_handler common

Rename soc/amd/common/block/cpu/smm/smi_ampc_helper.c to smi_apmc.c and
add the fch_apmc_smi_handler function.
Remove the duplicated function from picasso, cezanne, mendocino, and
morgana SoC.

The stoneyridge soc does not implement the APM_CNT_SMMINFO handler, so
give the handler a unique name that does not conflict with the common
handler name.

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I2e6fb59a1ee15b075ee3bbb5f95debe884b66789
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68441
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>

8 files changed, 40 insertions, 116 deletions

diff --git a/src/soc/amd/cezanne/smihandler.c b/src/soc/amd/cezanne/smihandler.c
index 2d59bd3adb..8f4e6d4ef6 100644
--- a/src/soc/amd/cezanne/smihandler.c
+++ b/src/soc/amd/cezanne/smihandler.c
@@ -19,34 +19,6 @@
 #include <soc/southbridge.h>
 #include <types.h>
 
-static void fch_apmc_smi_handler(void)
-{
-	const uint8_t cmd = inb(pm_acpi_smi_cmd_port());
-
-	switch (cmd) {
-	case APM_CNT_ACPI_ENABLE:
-		acpi_clear_pm_gpe_status();
-		acpi_enable_sci();
-		break;
-	case APM_CNT_ACPI_DISABLE:
-		acpi_disable_sci();
-		break;
-	case APM_CNT_ELOG_GSMI:
-		if (CONFIG(ELOG_GSMI))
-			handle_smi_gsmi();
-		break;
-	case APM_CNT_SMMSTORE:
-		if (CONFIG(SMMSTORE))
-			handle_smi_store();
-		break;
-	case APM_CNT_SMMINFO:
-		psp_notify_smm();
-		break;
-	}
-
-	mainboard_smi_apmc(cmd);
-}
-
 /*
  * Both the psp_notify_sx_info and the smu_sx_entry call will clobber the SMN index register
  * during the SMN accesses. Since the SMI handler is the last thing that gets called before
diff --git a/src/soc/amd/common/block/cpu/smm/Makefile.inc b/src/soc/amd/common/block/cpu/smm/Makefile.inc
index 5694d1d9ca..3b6fb807e5 100644
--- a/src/soc/amd/common/block/cpu/smm/Makefile.inc
+++ b/src/soc/amd/common/block/cpu/smm/Makefile.inc
@@ -5,7 +5,7 @@ postcar-y += smm_helper.c
 ramstage-y += finalize.c
 ramstage-y += smm_relocate.c
 ramstage-y += smm_helper.c
-smm-y += smi_apmc_helper.c
+smm-y += smi_apmc.c
 smm-y += smi_handler.c
 
 endif # CONFIG_SOC_AMD_COMMON_BLOCK_SMM
diff --git a/src/soc/amd/common/block/cpu/smm/smi_apmc_helper.c b/src/soc/amd/common/block/cpu/smm/smi_apmc.c
index 7b3afc2b81..0eab86c9da 100644
--- a/src/soc/amd/common/block/cpu/smm/smi_apmc_helper.c
+++ b/src/soc/amd/common/block/cpu/smm/smi_apmc.c
@@ -1,6 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
+#include <acpi/acpi.h>
+#include <amdblocks/acpi.h>
+#include <amdblocks/psp.h>
 #include <amdblocks/smm.h>
+#include <arch/io.h>
 #include <cpu/amd/amd64_save_state.h>
 #include <cpu/x86/smm.h>
 #include <elog.h>
@@ -84,3 +88,31 @@ void handle_smi_store(void)
 	/* drivers/smmstore/smi.c */
 	io_smi->rax = smmstore_exec(sub_command, (void *)(uintptr_t)reg_ebx);
 }
+
+void fch_apmc_smi_handler(void)
+{
+	const uint8_t cmd = inb(pm_acpi_smi_cmd_port());
+
+	switch (cmd) {
+	case APM_CNT_ACPI_ENABLE:
+		acpi_clear_pm_gpe_status();
+		acpi_enable_sci();
+		break;
+	case APM_CNT_ACPI_DISABLE:
+		acpi_disable_sci();
+		break;
+	case APM_CNT_ELOG_GSMI:
+		if (CONFIG(ELOG_GSMI))
+			handle_smi_gsmi();
+	break;
+	case APM_CNT_SMMSTORE:
+		if (CONFIG(SMMSTORE))
+			handle_smi_store();
+	break;
+	case APM_CNT_SMMINFO:
+		psp_notify_smm();
+		break;
+	}
+
+	mainboard_smi_apmc(cmd);
+}
diff --git a/src/soc/amd/common/block/include/amdblocks/smm.h b/src/soc/amd/common/block/include/amdblocks/smm.h
index 2218385477..fb2e488922 100644
--- a/src/soc/amd/common/block/include/amdblocks/smm.h
+++ b/src/soc/amd/common/block/include/amdblocks/smm.h
@@ -9,6 +9,7 @@
 void *get_smi_source_handler(int source);
 void handle_smi_gsmi(void);
 void handle_smi_store(void);
+void fch_apmc_smi_handler(void);
 void clear_tvalid(void);
 void lock_smm(void);
 /* See SMITYPE_* for list possible of events. GEVENTS are handled with mainboard_smi_gpi. */
diff --git a/src/soc/amd/mendocino/smihandler.c b/src/soc/amd/mendocino/smihandler.c
index de09dc3e5a..c05f3eea3e 100644
--- a/src/soc/amd/mendocino/smihandler.c
+++ b/src/soc/amd/mendocino/smihandler.c
@@ -19,34 +19,6 @@
 #include <soc/southbridge.h>
 #include <types.h>
 
-static void fch_apmc_smi_handler(void)
-{
-	const uint8_t cmd = inb(pm_acpi_smi_cmd_port());
-
-	switch (cmd) {
-	case APM_CNT_ACPI_ENABLE:
-		acpi_clear_pm_gpe_status();
-		acpi_enable_sci();
-		break;
-	case APM_CNT_ACPI_DISABLE:
-		acpi_disable_sci();
-		break;
-	case APM_CNT_ELOG_GSMI:
-		if (CONFIG(ELOG_GSMI))
-			handle_smi_gsmi();
-		break;
-	case APM_CNT_SMMSTORE:
-		if (CONFIG(SMMSTORE))
-			handle_smi_store();
-		break;
-	case APM_CNT_SMMINFO:
-		psp_notify_smm();
-		break;
-	}
-
-	mainboard_smi_apmc(cmd);
-}
-
 /*
  * Both the psp_notify_sx_info and the smu_sx_entry call will clobber the SMN index register
  * during the SMN accesses. Since the SMI handler is the last thing that gets called before
diff --git a/src/soc/amd/morgana/smihandler.c b/src/soc/amd/morgana/smihandler.c
index 1f44afa0b2..a1eabed208 100644
--- a/src/soc/amd/morgana/smihandler.c
+++ b/src/soc/amd/morgana/smihandler.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 /* TODO: Update for Morgana */
-/* TODO: What can be made common */
 
 #include <acpi/acpi.h>
 #include <amdblocks/acpi.h>
@@ -20,34 +19,6 @@
 #include <soc/southbridge.h>
 #include <types.h>
 
-static void fch_apmc_smi_handler(void)
-{
-	const uint8_t cmd = inb(pm_acpi_smi_cmd_port());
-
-	switch (cmd) {
-	case APM_CNT_ACPI_ENABLE:
-		acpi_clear_pm_gpe_status();
-		acpi_enable_sci();
-		break;
-	case APM_CNT_ACPI_DISABLE:
-		acpi_disable_sci();
-		break;
-	case APM_CNT_ELOG_GSMI:
-		if (CONFIG(ELOG_GSMI))
-			handle_smi_gsmi();
-		break;
-	case APM_CNT_SMMSTORE:
-		if (CONFIG(SMMSTORE))
-			handle_smi_store();
-		break;
-	case APM_CNT_SMMINFO:
-		psp_notify_smm();
-		break;
-	}
-
-	mainboard_smi_apmc(cmd);
-}
-
 /*
  * Both the psp_notify_sx_info and the smu_sx_entry call will clobber the SMN index register
  * during the SMN accesses. Since the SMI handler is the last thing that gets called before
diff --git a/src/soc/amd/picasso/smihandler.c b/src/soc/amd/picasso/smihandler.c
index b4cab2d717..9568fce73e 100644
--- a/src/soc/amd/picasso/smihandler.c
+++ b/src/soc/amd/picasso/smihandler.c
@@ -17,34 +17,6 @@
 #include <soc/southbridge.h>
 #include <types.h>
 
-static void fch_apmc_smi_handler(void)
-{
-	const uint8_t cmd = inb(pm_acpi_smi_cmd_port());
-
-	switch (cmd) {
-	case APM_CNT_ACPI_ENABLE:
-		acpi_clear_pm_gpe_status();
-		acpi_enable_sci();
-		break;
-	case APM_CNT_ACPI_DISABLE:
-		acpi_disable_sci();
-		break;
-	case APM_CNT_ELOG_GSMI:
-		if (CONFIG(ELOG_GSMI))
-			handle_smi_gsmi();
-		break;
-	case APM_CNT_SMMSTORE:
-		if (CONFIG(SMMSTORE))
-			handle_smi_store();
-		break;
-	case APM_CNT_SMMINFO:
-		psp_notify_smm();
-		break;
-	}
-
-	mainboard_smi_apmc(cmd);
-}
-
 /*
  * Both the psp_notify_sx_info and the smu_sx_entry call will clobber the SMN index register
  * during the SMN accesses. Since the SMI handler is the last thing that gets called before
diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c
index 50a5111461..7ba9bb8853 100644
--- a/src/soc/amd/stoneyridge/smihandler.c
+++ b/src/soc/amd/stoneyridge/smihandler.c
@@ -15,7 +15,11 @@
 #include <soc/southbridge.h>
 #include <types.h>
 
-static void fch_apmc_smi_handler(void)
+/*
+ * stoneyridge does not implement the APM_CNT_SMMINFO handler,
+ * so it needs a special version
+ */
+static void stoneyridge_fch_apmc_smi_handler(void)
 {
 	const uint8_t cmd = inb(pm_acpi_smi_cmd_port());
 
@@ -135,7 +139,7 @@ int southbridge_io_trap_handler(int smif)
  * in southbridge.c is unrelated to this list.
  */
 static const struct smi_sources_t smi_sources[] = {
-	{ .type = SMITYPE_SMI_CMD_PORT, .handler = fch_apmc_smi_handler },
+	{ .type = SMITYPE_SMI_CMD_PORT, .handler = stoneyridge_fch_apmc_smi_handler },
 	{ .type = SMITYPE_SLP_TYP, .handler = fch_slp_typ_handler},
 };