diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-05-31 23:43:36 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-09 15:34:29 +0000 |
| commit | f4fe21d900cc0fd549ff1c65b7ecc3010bb50dfd (patch) | |
| tree | 7d100f9d50da51493cce75762f5be2d765a28b28 /src/soc | |
| parent | 087610354512a4f36b530e51b8a50806c505fd06 (diff) | |
soc/intel/cmn/mp_init: Reload microcode patch before post_cpus_init()
This patch provides an option for CPU programming where coreboot
expected to load second microcode patch after BIOS Done bit is set
and before setting the BIOS Reset CPL bit.
BUG=b:233199592
TEST=Build and boot google/taeko to ChromeOS.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I426b38cb1200e60398bc89515838e49ce0a98f06
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64836
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/cpu/mp_init.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index 52b1494fd2..0be6e2a0b4 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -180,6 +180,9 @@ void before_post_cpus_init(void) { if (mp_run_on_all_cpus(&wrapper_set_bios_done, NULL) != CB_SUCCESS) printk(BIOS_ERR, "Set BIOS Done failure\n"); + + initialize_microcode(); + printk(BIOS_INFO, "%s: second patch load done\n", __func__); } /* Ensure to re-program all MTRRs based on DRAM resource settings */ |