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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-14 21:35:55 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-15 20:04:28 +0000
commitf38fbbec2c0061d122466cec346c2634aa26e236 (patch)
tree772c5e1517b85b955c3a1cf8c039216ea3b8480e /src/soc
parent640ec2581b1cdbb9dca385b49a32d2bdb1d4d9c5 (diff)
soc/amd/common/include/espi: rename configure_espi
Rename configure_espi to configure_espi_with_mb_hook to clarify that this function will call into the mb_set_up_early_espi function in the mainboard-specific code if it exists. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I5d0f099288b0100242629c736dd69a8add977b5b Reviewed-on: https://review.coreboot.org/c/coreboot/+/58338 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/early_fch.c2
-rw-r--r--src/soc/amd/common/block/include/amdblocks/espi.h2
-rw-r--r--src/soc/amd/picasso/early_fch.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index 69458b6220..f97f57c846 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -41,7 +41,7 @@ void fch_pre_init(void)
/* Setup SPI base by calling lpc_early_init before setting up eSPI. */
lpc_early_init();
/* Setup eSPI to enable port80 routing. */
- configure_espi();
+ configure_espi_with_mb_hook();
fch_spi_early_init();
fch_smbus_init();
fch_enable_cf9_io();
diff --git a/src/soc/amd/common/block/include/amdblocks/espi.h b/src/soc/amd/common/block/include/amdblocks/espi.h
index 7e49ea0f2e..0f8066b2a6 100644
--- a/src/soc/amd/common/block/include/amdblocks/espi.h
+++ b/src/soc/amd/common/block/include/amdblocks/espi.h
@@ -132,7 +132,7 @@ int espi_setup(void);
void mb_set_up_early_espi(void);
/* Setup eSPI with any mainboard specific initialization. */
-static inline void configure_espi(void)
+static inline void configure_espi_with_mb_hook(void)
{
/* If eSPI is setup in PSP Verstage, continue with that. Else setup eSPI to perform
port80h routing as early as possible. */
diff --git a/src/soc/amd/picasso/early_fch.c b/src/soc/amd/picasso/early_fch.c
index 8771e387bc..83b4ae4579 100644
--- a/src/soc/amd/picasso/early_fch.c
+++ b/src/soc/amd/picasso/early_fch.c
@@ -48,7 +48,7 @@ void fch_pre_init(void)
/* Setup SPI base by calling lpc_early_init before setting up eSPI. */
lpc_early_init();
/* Setup eSPI to enable port80 routing. */
- configure_espi();
+ configure_espi_with_mb_hook();
if (!CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
lpc_configure_decodes();