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authorMatt DeVillier <matt.devillier@gmail.com>2023-08-31 10:06:00 -0500
committerMartin L Roth <gaumless@gmail.com>2023-09-01 21:26:47 +0000
commitecf2b42e73d955737f9af7adf2bfcf9bcf29f41f (patch)
tree376bfad54a18d00022b08d8a2c8aa7492785699f /src/soc
parentbed01d794f0b94f2a3cf4c1a3a45f7536b05d288 (diff)
soc/intel/{adl,jsl,mtl,tgl}: Add ACPI name for GNA device
Add SA_DEV_SLOT_GNA definition to SoCs missing it, so the name resolves properly. TEST=tested with rest of patch train Change-Id: I31c8b14e5083fc8e212a4e32330125fa72696c73 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: CoolStar <coolstarorganization@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77576 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/alderlake/chip.c1
-rw-r--r--src/soc/intel/jasperlake/chip.c1
-rw-r--r--src/soc/intel/jasperlake/include/soc/pci_devs.h10
-rw-r--r--src/soc/intel/meteorlake/chip.c1
-rw-r--r--src/soc/intel/tigerlake/chip.c1
-rw-r--r--src/soc/intel/tigerlake/include/soc/pci_devs.h4
6 files changed, 15 insertions, 3 deletions
diff --git a/src/soc/intel/alderlake/chip.c b/src/soc/intel/alderlake/chip.c
index 7f24032de6..8b32b965b5 100644
--- a/src/soc/intel/alderlake/chip.c
+++ b/src/soc/intel/alderlake/chip.c
@@ -94,6 +94,7 @@ const char *soc_acpi_name(const struct device *dev)
case SA_DEVFN_TBT2: return "TRP2";
case SA_DEVFN_TBT3: return "TRP3";
case SA_DEVFN_IPU: return "IPU0";
+ case SA_DEVFN_GNA: return "GNA";
case SA_DEVFN_DPTF: return "TCPU";
case PCH_DEVFN_ISH: return "ISHB";
case PCH_DEVFN_XHCI: return "XHCI";
diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c
index 567dccb6c9..8cf982a5e3 100644
--- a/src/soc/intel/jasperlake/chip.c
+++ b/src/soc/intel/jasperlake/chip.c
@@ -67,6 +67,7 @@ const char *soc_acpi_name(const struct device *dev)
case SA_DEVFN_ROOT: return "MCHC";
case SA_DEVFN_IPU: return "IPU0";
case PCH_DEVFN_ISH: return "ISHB";
+ case SA_DEVFN_GNA: return "GNA";
case PCH_DEVFN_XHCI: return "XHCI";
case PCH_DEVFN_I2C0: return "I2C0";
case PCH_DEVFN_I2C1: return "I2C1";
diff --git a/src/soc/intel/jasperlake/include/soc/pci_devs.h b/src/soc/intel/jasperlake/include/soc/pci_devs.h
index f6c4fc545b..e3276458bf 100644
--- a/src/soc/intel/jasperlake/include/soc/pci_devs.h
+++ b/src/soc/intel/jasperlake/include/soc/pci_devs.h
@@ -30,6 +30,10 @@
#define SA_DEVFN_DPTF PCI_DEVFN(SA_DEV_SLOT_DPTF, 0)
#define SA_DEV_DPTF PCI_DEV(0, SA_DEV_SLOT_DPTF, 0)
+#define SA_DEV_SLOT_IPU 0x05
+#define SA_DEVFN_IPU PCI_DEVFN(SA_DEV_SLOT_IPU, 0)
+#define SA_DEV_IPU PCI_DEV(0, SA_DEV_SLOT_IPU, 0)
+
#define SA_DEV_SLOT_TBT 0x07
#define SA_DEVFN_TBT0 PCI_DEVFN(SA_DEV_SLOT_TBT, 0)
#define SA_DEVFN_TBT1 PCI_DEVFN(SA_DEV_SLOT_TBT, 1)
@@ -40,9 +44,9 @@
#define SA_DEV_TBT2 PCI_DEV(0, SA_DEV_SLOT_TBT, 2)
#define SA_DEV_TBT3 PCI_DEV(0, SA_DEV_SLOT_TBT, 3)
-#define SA_DEV_SLOT_IPU 0x05
-#define SA_DEVFN_IPU PCI_DEVFN(SA_DEV_SLOT_IPU, 0)
-#define SA_DEV_IPU PCI_DEV(0, SA_DEV_SLOT_IPU, 0)
+#define SA_DEV_SLOT_GNA 0x08
+#define SA_DEVFN_GNA PCI_DEVFN(SA_DEV_SLOT_GNA, 0)
+#define SA_DEV_GNA PCI_DEV(0, SA_DEV_SLOT_GNA, 0)
/* PCH Devices */
#define PCH_DEV_SLOT_SIO0 0x10
diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c
index 79a2452db2..954c32bdfc 100644
--- a/src/soc/intel/meteorlake/chip.c
+++ b/src/soc/intel/meteorlake/chip.c
@@ -83,6 +83,7 @@ const char *soc_acpi_name(const struct device *dev)
case PCI_DEVFN_TBT3: return "TRP3";
case PCI_DEVFN_IPU: return "IPU0";
case PCI_DEVFN_ISH: return "ISHB";
+ case PCI_DEVFN_GNA: return "GNA";
case PCI_DEVFN_XHCI: return "XHCI";
case PCI_DEVFN_I2C0: return "I2C0";
case PCI_DEVFN_I2C1: return "I2C1";
diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c
index 242ec987d2..15281c8c46 100644
--- a/src/soc/intel/tigerlake/chip.c
+++ b/src/soc/intel/tigerlake/chip.c
@@ -83,6 +83,7 @@ const char *soc_acpi_name(const struct device *dev)
case SA_DEVFN_TBT2: return "TRP2";
case SA_DEVFN_TBT3: return "TRP3";
case SA_DEVFN_IPU: return "IPU0";
+ case SA_DEVFN_GNA: return "GNA";
case PCH_DEVFN_ISH: return "ISHB";
case PCH_DEVFN_XHCI: return "XHCI";
case PCH_DEVFN_I2C0: return "I2C0";
diff --git a/src/soc/intel/tigerlake/include/soc/pci_devs.h b/src/soc/intel/tigerlake/include/soc/pci_devs.h
index 7a9ea32eea..d93c97f3c3 100644
--- a/src/soc/intel/tigerlake/include/soc/pci_devs.h
+++ b/src/soc/intel/tigerlake/include/soc/pci_devs.h
@@ -57,6 +57,10 @@
#define SA_DEV_TBT2 PCI_DEV(0, SA_DEV_SLOT_TBT, 2)
#define SA_DEV_TBT3 PCI_DEV(0, SA_DEV_SLOT_TBT, 3)
+#define SA_DEV_SLOT_GNA 0x08
+#define SA_DEVFN_GNA PCI_DEVFN(SA_DEV_SLOT_GNA, 0)
+#define SA_DEV_GNA PCI_DEV(0, SA_DEV_SLOT_GNA, 0)
+
#define SA_DEV_SLOT_TMT 0x0A
#define SA_DEVFN_TMT _SA_DEVFN(TMT)
#define SA_DEV_TMT _SA_DEV(TMT)