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authorRaul E Rangel <rrangel@chromium.org>2021-05-10 14:49:55 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-05-12 00:44:17 +0000
commite4f831786c7b636830f8092bca07fb19b79978a9 (patch)
tree055f7b4838fb1a58e30484f5fe4875ef4dda590e /src/soc
parent8479656c7194878ff893212ff4a949947e1f290e (diff)
soc/amd{common,cezanne}: Move pcie_gpp.c to common
Cezanne and Picasso can now use the same driver. BUG=b:184766519 TEST=Boot guybrush and dump ASL. Verified it didn't change. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ie4ede82935d6c69b323c1fdceaa61e306aa2820a Reviewed-on: https://review.coreboot.org/c/coreboot/+/54026 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/Kconfig1
-rw-r--r--src/soc/amd/cezanne/Makefile.inc1
-rw-r--r--src/soc/amd/common/block/pci/Kconfig6
-rw-r--r--src/soc/amd/common/block/pci/Makefile.inc1
-rw-r--r--src/soc/amd/common/block/pci/pcie_gpp.c (renamed from src/soc/amd/cezanne/pcie_gpp.c)0
5 files changed, 8 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 51bc4bc13a..327ec124d2 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -50,6 +50,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON_BLOCK_NONCAR
select SOC_AMD_COMMON_BLOCK_PCI
select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
+ select SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER
select SOC_AMD_COMMON_BLOCK_PM
select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE
select SOC_AMD_COMMON_BLOCK_PSP_GEN2
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 7053960e43..4731dc5ce7 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -39,7 +39,6 @@ ramstage-y += data_fabric.c
ramstage-y += fch.c
ramstage-y += fsp_s_params.c
ramstage-y += gpio.c
-ramstage-y += pcie_gpp.c
ramstage-y += reset.c
ramstage-y += root_complex.c
ramstage-y += uart.c
diff --git a/src/soc/amd/common/block/pci/Kconfig b/src/soc/amd/common/block/pci/Kconfig
index 4af0aa0d64..302a6b8497 100644
--- a/src/soc/amd/common/block/pci/Kconfig
+++ b/src/soc/amd/common/block/pci/Kconfig
@@ -10,3 +10,9 @@ config SOC_AMD_COMMON_BLOCK_PCI_MMCONF
help
Selecting this option adds the AMD-common enable_pci_mmconf function
to the build.
+
+config SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER
+ bool
+ depends on SOC_AMD_COMMON_BLOCK_PCI
+ help
+ Select this option to use AMD common PCIe GPP driver.
diff --git a/src/soc/amd/common/block/pci/Makefile.inc b/src/soc/amd/common/block/pci/Makefile.inc
index 8c7a9899ae..e013777acc 100644
--- a/src/soc/amd/common/block/pci/Makefile.inc
+++ b/src/soc/amd/common/block/pci/Makefile.inc
@@ -3,6 +3,7 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PCI),y)
ramstage-y += amd_pci_util.c
ramstage-y += pci_routing_info.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_prt.c
+ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PCIE_GPP_DRIVER) += pcie_gpp.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_PCI
diff --git a/src/soc/amd/cezanne/pcie_gpp.c b/src/soc/amd/common/block/pci/pcie_gpp.c
index 58c776146f..58c776146f 100644
--- a/src/soc/amd/cezanne/pcie_gpp.c
+++ b/src/soc/amd/common/block/pci/pcie_gpp.c