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authorLijian Zhao <lijian.zhao@intel.com>2018-07-24 17:46:20 -0700
committerMartin Roth <martinroth@google.com>2018-09-21 15:14:24 +0000
commite391cbff7ff5217c0bb17515a50c8bd88935eb31 (patch)
tree0ca76ff63a27a31ffd87c1d0cc9e9a3b232048cb /src/soc
parent5b5656565ba4046f7d7fdc61d9fc79a1f67993be (diff)
mb/intel/coffeelake_rvp: Add whiskey lake rvp
Add new mainboard variant of whiskey lake rvp, which is primary validation platform for whiskey lake silicon, support socket DDR4 memory module. BUG=N/A TEST=Build and flash, confirm boot up into kernel on whiskey lake rvp platform. Change-Id: I4a5e8a9ec76d5e55e55ef9bf968825c17fbe9816 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/27628 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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