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authorJayvik Desai <jayvik@google.com>2024-08-05 21:16:49 +0530
committerSubrata Banik <subratabanik@google.com>2024-08-13 14:51:11 +0000
commitdfa830e53092b4b52fa548c3616873a86c3818ad (patch)
tree77a540c99474fb9c6407a110bdf80d0c8f90c820 /src/soc
parent95d03996d9f622fe27bbcd711832d1184fc9a55b (diff)
soc/intel/mtl: enable FSP uGOP config in MTL for eSOL
This patch updates the platform-specific Meteor Lake early sign-of-life config (SOC_INTEL_METEORLAKE_SIGN_OF_LIFE) with a generic ChromeOS eSOL config (CHROMEOS_ENABLE_ESOL) which uses the Intel FSP uGOP driver as an underlying technology for rendering eSOL screen. This patch does not change the binary or the system behaviour. BUG=b:352651132 TEST=Able to build google/rex and checked the config in output. Change-Id: Ib4589f52080229b1c83915b51272a042b7ac32cd Signed-off-by: Jayvik Desai <jayvik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83769 Reviewed-by: Dinesh Gehlot <digehlot@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/meteorlake/Kconfig11
-rw-r--r--src/soc/intel/meteorlake/romstage/fsp_params.c2
2 files changed, 2 insertions, 11 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index ec8c31830b..327b3a240e 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -20,6 +20,7 @@ config SOC_INTEL_METEORLAKE
select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW
select FSP_M_XIP
select FSP_STATUS_GLOBAL_RESET_REQUIRED_3
+ select FSP_UGOP_EARLY_SIGN_OF_LIFE if !SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON
select FSP_USES_CB_DEBUG_EVENT_HANDLER
select FSPS_HAS_ARCH_UPD
select GENERIC_GPIO_LIB
@@ -457,16 +458,6 @@ config SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ
help
slp_s0_residency granularity in 122us ticks (i.e. ~8.2KHz) in Meteor Lake.
-config SOC_INTEL_METEORLAKE_SIGN_OF_LIFE
- bool
- default y if !SOC_INTEL_METEORLAKE_PRE_PRODUCTION_SILICON
- depends on MAINBOARD_HAS_CHROMEOS
- select VBT_CBFS_COMPRESSION_DEFAULT_LZ4
- help
- Enable the FSP-M Sign-of-Life feature to display a
- configurable text message on screen during memory training
- and CSME update.
-
config SOC_PHYSICAL_ADDRESS_WIDTH
int
default 42
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index ec783833ba..9734c63d5f 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -511,7 +511,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
soc_memory_init_params(m_cfg, config);
- if (CONFIG(SOC_INTEL_METEORLAKE_SIGN_OF_LIFE))
+ if (CONFIG(CHROMEOS_ENABLE_ESOL))
fill_fspm_sign_of_life(m_cfg, arch_upd);
mainboard_memory_init_params(mupd);