summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorJeremy Soller <jeremy@system76.com>2023-05-16 15:04:08 -0600
committerMartin L Roth <gaumless@gmail.com>2023-08-09 14:57:55 +0000
commitd59c79987df0498de7ee847f41782457a5320141 (patch)
treee79ad91a06d476041aeb50c0b13233c0335e0683 /src/soc
parent646f7b8443b2228f563e0c8bd78257c85db59b4f (diff)
Revert "soc/intel/{adl, cmn/pcie}: Fix ASPM configuration enum definitions"
This reverts commit 5dfec718290609dc0fd0331070ad703107e0b7e7. Reason for revert: This change made it impossible to disable ASPM by FSP parameter. ASPM_DISABLE would result in the FSP parameter not being programmed, causing it to be the FSP default value instead. This additionally fixes MTL to match ADL. Change-Id: I60c0ea08513fcb0035449ea3fef1681de528c545 Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75280 Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/alderlake/fsp_params.c19
-rw-r--r--src/soc/intel/common/block/include/intelblocks/pcie_rp.h1
-rw-r--r--src/soc/intel/meteorlake/fsp_params.c19
3 files changed, 25 insertions, 14 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c
index 2260259753..4c8865c090 100644
--- a/src/soc/intel/alderlake/fsp_params.c
+++ b/src/soc/intel/alderlake/fsp_params.c
@@ -484,18 +484,23 @@ static int get_l1_substate_control(enum L1_substates_control ctl)
}
/*
+ * Chip config parameter pcie_rp_aspm uses (UPD value + 1) because
+ * a UPD value of 0 for pcie_rp_aspm means disabled. In order to ensure
+ * that the mainboard setting does not disable ASPM incorrectly, chip
+ * config parameter values are offset by 1 with 0 meaning use FSP UPD default.
* get_aspm_control() ensures that the right UPD value is set in fsp_params.
- * 0: Disable ASPM
- * 1: L0s only
- * 2: L1 only
- * 3: L0s and L1
- * 4: Auto configuration
+ * 0: Use FSP UPD default
+ * 1: Disable ASPM
+ * 2: L0s only
+ * 3: L1 only
+ * 4: L0s and L1
+ * 5: Auto configuration
*/
static unsigned int get_aspm_control(enum ASPM_control ctl)
{
- if (ctl > ASPM_AUTO)
+ if ((ctl > ASPM_AUTO) || (ctl == ASPM_DEFAULT))
ctl = ASPM_AUTO;
- return ctl;
+ return ctl - 1;
}
/* This function returns the VccIn Aux Imon IccMax values for ADL and RPL
diff --git a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
index be7c5f93f8..dff4d97382 100644
--- a/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
+++ b/src/soc/intel/common/block/include/intelblocks/pcie_rp.h
@@ -47,6 +47,7 @@ enum L1_substates_control {
/* This enum is for passing into an FSP UPD, typically ASPM */
enum ASPM_control {
+ ASPM_DEFAULT,
ASPM_DISABLE,
ASPM_L0S,
ASPM_L1,
diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c
index 58d4cda8fe..7a2a9d8b48 100644
--- a/src/soc/intel/meteorlake/fsp_params.c
+++ b/src/soc/intel/meteorlake/fsp_params.c
@@ -312,18 +312,23 @@ static int get_l1_substate_control(enum L1_substates_control ctl)
}
/*
+ * Chip config parameter pcie_rp_aspm uses (UPD value + 1) because
+ * a UPD value of 0 for pcie_rp_aspm means disabled. In order to ensure
+ * that the mainboard setting does not disable ASPM incorrectly, chip
+ * config parameter values are offset by 1 with 0 meaning use FSP UPD default.
* get_aspm_control() ensures that the right UPD value is set in fsp_params.
- * 0: Disable ASPM
- * 1: L0s only
- * 2: L1 only
- * 3: L0s and L1
- * 4: Auto configuration
+ * 0: Use FSP UPD default
+ * 1: Disable ASPM
+ * 2: L0s only
+ * 3: L1 only
+ * 4: L0s and L1
+ * 5: Auto configuration
*/
static unsigned int get_aspm_control(enum ASPM_control ctl)
{
- if (ctl > ASPM_AUTO)
+ if ((ctl > ASPM_AUTO) || (ctl == ASPM_DEFAULT))
ctl = ASPM_AUTO;
- return ctl;
+ return ctl - 1;
}
__weak void mainboard_update_soc_chip_config(struct soc_intel_meteorlake_config *config)