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authorDinesh Gehlot <digehlot@google.com>2022-12-16 09:21:18 +0000
committerMartin L Roth <gaumless@gmail.com>2022-12-25 15:24:36 +0000
commitd4f2d14d52cba27f25a53979548ea9bdaf71c23e (patch)
tree8dd3c9da43daf7cb51fabdfa0d9b05c9dc8b59ba /src/soc
parent2179c7fdb7c48e7cc3009c00cbd107267e0d7903 (diff)
soc/intel: Move max speed API to common
This patch moves API "smbios_cpu_get_max_speed_mhz()" to common code from board specific. This API was made generic in 'commit d34364bdea12 ("soc/intel/alderlake: Utilize `CPU_BCLK_MHZ` over dedicated macro")' BUG=NONE TEST=Boot and verified that SMBIOS max speed value is correct on brya and rex. (brya) dmidecode -t : "Max Speed: 4400 MHz" (rex) dmidecode -t : "Max Speed: 3400 MHz" Signed-off-by: Dinesh Gehlot <digehlot@google.com> Change-Id: I87040ab23319097287e191d7fc9579f16d716e62 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70879 Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/alderlake/Makefile.inc1
-rw-r--r--src/soc/intel/alderlake/smbios.c11
-rw-r--r--src/soc/intel/common/block/cpu/cpulib.c6
-rw-r--r--src/soc/intel/xeon_sp/cpx/Makefile.inc2
-rw-r--r--src/soc/intel/xeon_sp/cpx/ramstage.c8
5 files changed, 7 insertions, 21 deletions
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index 415c2b1a56..2055870251 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -46,7 +46,6 @@ ramstage-y += tcss.c
ramstage-y += vr_config.c
ramstage-y += xhci.c
ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c
-ramstage-y += smbios.c
smm-y += elog.c
smm-y += p2sb.c
diff --git a/src/soc/intel/alderlake/smbios.c b/src/soc/intel/alderlake/smbios.c
deleted file mode 100644
index 42692586fe..0000000000
--- a/src/soc/intel/alderlake/smbios.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <intelblocks/cpulib.h>
-#include <intelblocks/msr.h>
-#include <smbios.h>
-
-/* Provide the max turbo frequency of the CPU */
-unsigned int smbios_cpu_get_max_speed_mhz(void)
-{
- return cpu_get_max_turbo_ratio() * CONFIG_CPU_BCLK_MHZ;
-}
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index 1c7a173a7c..5332d01565 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -517,3 +517,9 @@ void set_tme_core_activate(void)
wrmsr(MSR_CORE_MKTME_ACTIVATION, msr);
}
+
+/* Provide the max turbo frequency of the CPU */
+unsigned int smbios_cpu_get_max_speed_mhz(void)
+{
+ return cpu_get_max_turbo_ratio() * CONFIG_CPU_BCLK_MHZ;
+}
diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc
index d2a1583fe8..593c339f45 100644
--- a/src/soc/intel/xeon_sp/cpx/Makefile.inc
+++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc
@@ -9,7 +9,7 @@ romstage-y += romstage.c ddr.c
romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
-ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c
+ramstage-y += chip.c cpu.c soc_util.c soc_acpi.c
ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c
ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
diff --git a/src/soc/intel/xeon_sp/cpx/ramstage.c b/src/soc/intel/xeon_sp/cpx/ramstage.c
deleted file mode 100644
index cd1b038b52..0000000000
--- a/src/soc/intel/xeon_sp/cpx/ramstage.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <smbios.h>
-
-unsigned int smbios_cpu_get_max_speed_mhz(void)
-{
- return 3900;
-}