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authorNico Huber <nico.h@gmx.de>2018-10-04 23:42:42 +0200
committerNico Huber <nico.h@gmx.de>2018-10-08 16:57:27 +0000
commitd44221f9c8f3686e040ff9481829315068b321a3 (patch)
tree76337bf1cae88feda44e3c63dd7e32e964e8767d /src/soc
parent834543c0c71544b547194b093b8e1da990722762 (diff)
Move compiler.h to commonlib
Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. While we are at it, always include it via GCC's `-include` switch. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/include/amdblocks/psp.h1
-rw-r--r--src/soc/amd/common/block/pi/agesawrapper.c1
-rw-r--r--src/soc/amd/common/block/pi/def_callouts.c1
-rw-r--r--src/soc/amd/stoneyridge/BiosCallOuts.c1
-rw-r--r--src/soc/amd/stoneyridge/gpio.c1
-rw-r--r--src/soc/amd/stoneyridge/include/soc/nvs.h1
-rw-r--r--src/soc/amd/stoneyridge/romstage.c1
-rw-r--r--src/soc/amd/stoneyridge/usb.c1
-rw-r--r--src/soc/intel/apollolake/chip.c1
-rw-r--r--src/soc/intel/apollolake/cse.c1
-rw-r--r--src/soc/intel/apollolake/include/soc/nvs.h1
-rw-r--r--src/soc/intel/apollolake/include/soc/pm.h1
-rw-r--r--src/soc/intel/apollolake/romstage.c2
-rw-r--r--src/soc/intel/baytrail/gpio.c1
-rw-r--r--src/soc/intel/baytrail/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/baytrail/include/soc/efi_wrapper.h2
-rw-r--r--src/soc/intel/baytrail/include/soc/gpio.h1
-rw-r--r--src/soc/intel/baytrail/include/soc/mrc_wrapper.h2
-rw-r--r--src/soc/intel/baytrail/include/soc/nvs.h1
-rw-r--r--src/soc/intel/baytrail/include/soc/pmc.h1
-rw-r--r--src/soc/intel/baytrail/southcluster.c1
-rw-r--r--src/soc/intel/baytrail/spi.c1
-rw-r--r--src/soc/intel/braswell/acpi.c1
-rw-r--r--src/soc/intel/braswell/chip.c1
-rw-r--r--src/soc/intel/braswell/gpio.c1
-rw-r--r--src/soc/intel/braswell/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/braswell/include/soc/gpio.h1
-rw-r--r--src/soc/intel/braswell/include/soc/nvs.h1
-rw-r--r--src/soc/intel/braswell/include/soc/pm.h1
-rw-r--r--src/soc/intel/braswell/southcluster.c1
-rw-r--r--src/soc/intel/braswell/spi.c1
-rw-r--r--src/soc/intel/broadwell/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/gpio.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/me.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/nvs.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/pei_data.h1
-rw-r--r--src/soc/intel/broadwell/include/soc/smm.h1
-rw-r--r--src/soc/intel/broadwell/romstage/romstage.c1
-rw-r--r--src/soc/intel/broadwell/spi.c1
-rw-r--r--src/soc/intel/cannonlake/chip.c1
-rw-r--r--src/soc/intel/cannonlake/fsp_params.c1
-rw-r--r--src/soc/intel/cannonlake/include/soc/nvs.h1
-rw-r--r--src/soc/intel/cannonlake/include/soc/pm.h1
-rw-r--r--src/soc/intel/cannonlake/reset.c1
-rw-r--r--src/soc/intel/cannonlake/romstage/romstage.c1
-rw-r--r--src/soc/intel/common/acpi_wake_source.c1
-rw-r--r--src/soc/intel/common/block/acpi/acpi.c1
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c1
-rw-r--r--src/soc/intel/common/block/ebda/ebda.c1
-rw-r--r--src/soc/intel/common/block/graphics/graphics.c1
-rw-r--r--src/soc/intel/common/block/gspi/gspi.c1
-rw-r--r--src/soc/intel/common/block/lpc/lpc.c1
-rw-r--r--src/soc/intel/common/block/pmc/pmc.c1
-rw-r--r--src/soc/intel/common/block/pmc/pmclib.c1
-rw-r--r--src/soc/intel/common/block/rtc/rtc.c1
-rw-r--r--src/soc/intel/common/block/smm/smihandler.c1
-rw-r--r--src/soc/intel/common/block/sram/sram.c1
-rw-r--r--src/soc/intel/common/block/systemagent/systemagent.c1
-rw-r--r--src/soc/intel/common/block/uart/uart.c1
-rw-r--r--src/soc/intel/common/block/xdci/xdci.c1
-rw-r--r--src/soc/intel/common/block/xhci/xhci.c1
-rw-r--r--src/soc/intel/common/mma.c1
-rw-r--r--src/soc/intel/common/vbt.c1
-rw-r--r--src/soc/intel/denverton_ns/acpi.c1
-rw-r--r--src/soc/intel/denverton_ns/fiamux.c1
-rw-r--r--src/soc/intel/denverton_ns/romstage.c1
-rw-r--r--src/soc/intel/fsp_baytrail/gpio.c1
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/gpio.h1
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/nvs.h1
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/pmc.h1
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c1
-rw-r--r--src/soc/intel/fsp_broadwell_de/include/soc/gpio.h1
-rw-r--r--src/soc/intel/fsp_broadwell_de/include/soc/smm.h1
-rw-r--r--src/soc/intel/fsp_broadwell_de/spi.c1
-rw-r--r--src/soc/intel/quark/gpio_i2c.c1
-rw-r--r--src/soc/intel/quark/include/soc/pei_wrapper.h1
-rw-r--r--src/soc/intel/quark/include/soc/pm.h1
-rw-r--r--src/soc/intel/skylake/acpi.c1
-rw-r--r--src/soc/intel/skylake/chip_fsp20.c1
-rw-r--r--src/soc/intel/skylake/include/soc/device_nvs.h1
-rw-r--r--src/soc/intel/skylake/include/soc/me.h2
-rw-r--r--src/soc/intel/skylake/include/soc/nvs.h1
-rw-r--r--src/soc/intel/skylake/include/soc/pei_data.h1
-rw-r--r--src/soc/intel/skylake/include/soc/pm.h1
-rw-r--r--src/soc/intel/skylake/include/soc/smm.h1
-rw-r--r--src/soc/intel/skylake/me.c1
-rw-r--r--src/soc/intel/skylake/romstage/romstage_fsp20.c1
-rw-r--r--src/soc/mediatek/common/mmu_operations.c1
-rw-r--r--src/soc/mediatek/common/timer.c1
-rw-r--r--src/soc/mediatek/common/uart.c1
-rw-r--r--src/soc/nvidia/tegra124/include/soc/clk_rst.h2
-rw-r--r--src/soc/nvidia/tegra124/include/soc/dma.h1
-rw-r--r--src/soc/nvidia/tegra124/include/soc/emc.h1
-rw-r--r--src/soc/nvidia/tegra124/include/soc/spi.h1
-rw-r--r--src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c1
-rw-r--r--src/soc/nvidia/tegra124/uart.c1
-rw-r--r--src/soc/nvidia/tegra210/bootblock.c1
-rw-r--r--src/soc/nvidia/tegra210/funitcfg.c1
-rw-r--r--src/soc/nvidia/tegra210/include/soc/clk_rst.h1
-rw-r--r--src/soc/nvidia/tegra210/include/soc/clst_clk.h2
-rw-r--r--src/soc/nvidia/tegra210/include/soc/dma.h1
-rw-r--r--src/soc/nvidia/tegra210/include/soc/emc.h1
-rw-r--r--src/soc/nvidia/tegra210/include/soc/spi.h1
-rw-r--r--src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c1
-rw-r--r--src/soc/nvidia/tegra210/romstage.c1
-rw-r--r--src/soc/nvidia/tegra210/uart.c1
-rw-r--r--src/soc/qualcomm/ipq40xx/include/soc/cdp.h1
-rw-r--r--src/soc/qualcomm/ipq40xx/lcc.c1
-rw-r--r--src/soc/qualcomm/ipq806x/include/soc/cdp.h1
-rw-r--r--src/soc/qualcomm/ipq806x/lcc.c1
-rw-r--r--src/soc/samsung/exynos5250/i2c.c1
-rw-r--r--src/soc/samsung/exynos5250/include/soc/power.h1
-rw-r--r--src/soc/samsung/exynos5420/i2c.c1
-rw-r--r--src/soc/samsung/exynos5420/include/soc/dmc.h2
-rw-r--r--src/soc/samsung/exynos5420/include/soc/power.h1
116 files changed, 0 insertions, 123 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h
index 6e1a1f0f05..25a564b457 100644
--- a/src/soc/amd/common/block/include/amdblocks/psp.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp.h
@@ -19,7 +19,6 @@
#include <amdblocks/agesawrapper.h>
#include <soc/pci_devs.h>
#include <stdint.h>
-#include <compiler.h>
/* Extra, Special Purpose Registers in the PSP PCI Config Space */
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index f2ece80f62..49a2c4c998 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -19,7 +19,6 @@
#include <cpu/x86/mtrr.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <delay.h>
#include <rules.h>
#include <rmodule.h>
diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c
index 56bd8662e7..d136084612 100644
--- a/src/soc/amd/common/block/pi/def_callouts.c
+++ b/src/soc/amd/common/block/pi/def_callouts.c
@@ -15,7 +15,6 @@
*/
#include <cbfs.h>
-#include <compiler.h>
#include <cpu/x86/lapic.h>
#include <cpu/x86/mp.h>
#include <timer.h>
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index 027ba4e5d5..5e6c899268 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -15,7 +15,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <device/device.h>
#include <device/pci_def.h>
#include <amdblocks/BiosCallOuts.h>
diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c
index b4b7acfe88..b469f820b2 100644
--- a/src/soc/amd/stoneyridge/gpio.c
+++ b/src/soc/amd/stoneyridge/gpio.c
@@ -21,7 +21,6 @@
#include <soc/gpio.h>
#include <soc/southbridge.h>
#include <assert.h>
-#include <compiler.h>
static const struct soc_amd_event gpio_event_table[] = {
{ GPIO_1, GEVENT_19 },
diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h
index 1477358a24..3e6ef3042b 100644
--- a/src/soc/amd/stoneyridge/include/soc/nvs.h
+++ b/src/soc/amd/stoneyridge/include/soc/nvs.h
@@ -25,7 +25,6 @@
#define __SOC_STONEYRIDGE_NVS_H__
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <stdint.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <soc/southbridge.h>
diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c
index a5acaf6f05..555e901501 100644
--- a/src/soc/amd/stoneyridge/romstage.c
+++ b/src/soc/amd/stoneyridge/romstage.c
@@ -17,7 +17,6 @@
#include <arch/io.h>
#include <arch/cpu.h>
#include <arch/acpi.h>
-#include <compiler.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
#include <cpu/amd/mtrr.h>
diff --git a/src/soc/amd/stoneyridge/usb.c b/src/soc/amd/stoneyridge/usb.c
index 6007af116b..14feef3e3e 100644
--- a/src/soc/amd/stoneyridge/usb.c
+++ b/src/soc/amd/stoneyridge/usb.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index ba10e35562..9ee6dbb96d 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -20,7 +20,6 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/mp.h>
diff --git a/src/soc/intel/apollolake/cse.c b/src/soc/intel/apollolake/cse.c
index 8842500fa8..9051dc3304 100644
--- a/src/soc/intel/apollolake/cse.c
+++ b/src/soc/intel/apollolake/cse.c
@@ -22,7 +22,6 @@
#include <soc/pci_devs.h>
#include <device/pci_ops.h>
#include <stdint.h>
-#include <compiler.h>
#define PCI_ME_HFSTS1 0x40
#define PCI_ME_HFSTS2 0x48
diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h
index 3250aeb277..6c37d5977b 100644
--- a/src/soc/intel/apollolake/include/soc/nvs.h
+++ b/src/soc/intel/apollolake/include/soc/nvs.h
@@ -25,7 +25,6 @@
#define _SOC_APOLLOLAKE_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <vendorcode/google/chromeos/gnvs.h>
typedef struct global_nvs_t {
diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h
index 6de39a068c..c4f1d1b39c 100644
--- a/src/soc/intel/apollolake/include/soc/pm.h
+++ b/src/soc/intel/apollolake/include/soc/pm.h
@@ -19,7 +19,6 @@
#define _SOC_APOLLOLAKE_PM_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/acpi.h>
#include <soc/gpe.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 416877103c..995564d717 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -24,7 +24,6 @@
#include <bootmode.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/pae.h>
@@ -52,7 +51,6 @@
#include <timestamp.h>
#include <timer.h>
#include <delay.h>
-#include <compiler.h>
#include "chip.h"
static const uint8_t hob_variable_guid[16] = {
diff --git a/src/soc/intel/baytrail/gpio.c b/src/soc/intel/baytrail/gpio.c
index 451993df2f..743ab9fbef 100644
--- a/src/soc/intel/baytrail/gpio.c
+++ b/src/soc/intel/baytrail/gpio.c
@@ -14,7 +14,6 @@
*/
#include <device/pci.h>
-#include <compiler.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <soc/pmc.h>
diff --git a/src/soc/intel/baytrail/include/soc/device_nvs.h b/src/soc/intel/baytrail/include/soc/device_nvs.h
index bc6f7ec5de..74e312a858 100644
--- a/src/soc/intel/baytrail/include/soc/device_nvs.h
+++ b/src/soc/intel/baytrail/include/soc/device_nvs.h
@@ -17,7 +17,6 @@
#define _BAYTRAIL_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define LPSS_NVS_SIO_DMA1 0
#define LPSS_NVS_I2C1 1
diff --git a/src/soc/intel/baytrail/include/soc/efi_wrapper.h b/src/soc/intel/baytrail/include/soc/efi_wrapper.h
index 3425aae823..d362494638 100644
--- a/src/soc/intel/baytrail/include/soc/efi_wrapper.h
+++ b/src/soc/intel/baytrail/include/soc/efi_wrapper.h
@@ -29,8 +29,6 @@
#ifndef __EFI_WRAPPER_H__
#define __EFI_WRAPPER_H__
-#include <compiler.h>
-
#define EFI_WRAPPER_VER 2
/* Provide generic x86 calling conventions. */
diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h
index 93e80cbab2..474aaea314 100644
--- a/src/soc/intel/baytrail/include/soc/gpio.h
+++ b/src/soc/intel/baytrail/include/soc/gpio.h
@@ -17,7 +17,6 @@
#define _BAYTRAIL_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/io.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/baytrail/include/soc/mrc_wrapper.h b/src/soc/intel/baytrail/include/soc/mrc_wrapper.h
index d3547c2fb2..d7f4483820 100644
--- a/src/soc/intel/baytrail/include/soc/mrc_wrapper.h
+++ b/src/soc/intel/baytrail/include/soc/mrc_wrapper.h
@@ -28,8 +28,6 @@
#ifndef _MRC_WRAPPER_H_
#define _MRC_WRAPPER_H_
-#include <compiler.h>
-
#define MRC_PARAMS_VER 5
#define NUM_CHANNELS 2
diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h
index 715929d7ea..08ccbf44ff 100644
--- a/src/soc/intel/baytrail/include/soc/nvs.h
+++ b/src/soc/intel/baytrail/include/soc/nvs.h
@@ -18,7 +18,6 @@
#define _BAYTRAIL_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <vendorcode/google/chromeos/gnvs.h>
#include <soc/device_nvs.h>
diff --git a/src/soc/intel/baytrail/include/soc/pmc.h b/src/soc/intel/baytrail/include/soc/pmc.h
index c287d9cea9..bc8e877697 100644
--- a/src/soc/intel/baytrail/include/soc/pmc.h
+++ b/src/soc/intel/baytrail/include/soc/pmc.h
@@ -16,7 +16,6 @@
#ifndef _BAYTRAIL_PMC_H_
#define _BAYTRAIL_PMC_H_
-#include <compiler.h>
#include <arch/acpi.h>
#define IOCOM1 0x3f8
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 83f4227bff..0ef70d020b 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -19,7 +19,6 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index c42b398594..d81b878e51 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -14,7 +14,6 @@
/* This file is derived from the flashrom project. */
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
#include <bootstate.h>
diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c
index 0a683fba6b..c11adb9d41 100644
--- a/src/soc/intel/braswell/acpi.c
+++ b/src/soc/intel/braswell/acpi.c
@@ -22,7 +22,6 @@
#include <arch/smp/mpspec.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/intel/turbo.h>
diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c
index 35cbd156eb..4d135390f6 100644
--- a/src/soc/intel/braswell/chip.c
+++ b/src/soc/intel/braswell/chip.c
@@ -15,7 +15,6 @@
*/
#include <chip.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/braswell/gpio.c b/src/soc/intel/braswell/gpio.c
index 23be45a1c1..a5b289401f 100644
--- a/src/soc/intel/braswell/gpio.c
+++ b/src/soc/intel/braswell/gpio.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <device/pci.h>
#include <soc/gpio.h>
diff --git a/src/soc/intel/braswell/include/soc/device_nvs.h b/src/soc/intel/braswell/include/soc/device_nvs.h
index 8ed534eb91..e98337cdea 100644
--- a/src/soc/intel/braswell/include/soc/device_nvs.h
+++ b/src/soc/intel/braswell/include/soc/device_nvs.h
@@ -18,7 +18,6 @@
#define _SOC_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define LPSS_NVS_SIO_DMA1 0
#define LPSS_NVS_I2C1 1
diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h
index 6b382fc171..894096f59a 100644
--- a/src/soc/intel/braswell/include/soc/gpio.h
+++ b/src/soc/intel/braswell/include/soc/gpio.h
@@ -18,7 +18,6 @@
#define _SOC_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/io.h>
#include <soc/gpio_defs.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/braswell/include/soc/nvs.h b/src/soc/intel/braswell/include/soc/nvs.h
index 05831bb7d1..7f044a5d21 100644
--- a/src/soc/intel/braswell/include/soc/nvs.h
+++ b/src/soc/intel/braswell/include/soc/nvs.h
@@ -19,7 +19,6 @@
#define _SOC_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <rules.h>
#include <soc/device_nvs.h>
#include <vendorcode/google/chromeos/gnvs.h>
diff --git a/src/soc/intel/braswell/include/soc/pm.h b/src/soc/intel/braswell/include/soc/pm.h
index 5ac29f4e30..5d8c332feb 100644
--- a/src/soc/intel/braswell/include/soc/pm.h
+++ b/src/soc/intel/braswell/include/soc/pm.h
@@ -17,7 +17,6 @@
#ifndef _SOC_PM_H_
#define _SOC_PM_H_
-#include <compiler.h>
#include <arch/acpi.h>
#define IOCOM1 0x3f8
diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c
index 24d4b8b476..14b412a03f 100644
--- a/src/soc/intel/braswell/southcluster.c
+++ b/src/soc/intel/braswell/southcluster.c
@@ -21,7 +21,6 @@
#include <bootstate.h>
#include <cbmem.h>
#include "chip.h"
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c
index f2d178d11a..0f42a90e2d 100644
--- a/src/soc/intel/braswell/spi.c
+++ b/src/soc/intel/braswell/spi.c
@@ -26,7 +26,6 @@
#include <spi_flash.h>
#include <spi-generic.h>
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
diff --git a/src/soc/intel/broadwell/include/soc/device_nvs.h b/src/soc/intel/broadwell/include/soc/device_nvs.h
index d17b3d461e..c37816cfba 100644
--- a/src/soc/intel/broadwell/include/soc/device_nvs.h
+++ b/src/soc/intel/broadwell/include/soc/device_nvs.h
@@ -17,7 +17,6 @@
#define _BROADWELL_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define SIO_NVS_DMA 0
#define SIO_NVS_I2C0 1
diff --git a/src/soc/intel/broadwell/include/soc/gpio.h b/src/soc/intel/broadwell/include/soc/gpio.h
index d5ff7bb295..66820b2184 100644
--- a/src/soc/intel/broadwell/include/soc/gpio.h
+++ b/src/soc/intel/broadwell/include/soc/gpio.h
@@ -17,7 +17,6 @@
#define _BROADWELL_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
#define CROS_GPIO_DEVICE_NAME "PCH-LP"
#define CROS_GPIO_ACPI_DEVICE_NAME "INT3437:00"
diff --git a/src/soc/intel/broadwell/include/soc/me.h b/src/soc/intel/broadwell/include/soc/me.h
index 34b44816e8..a213e37047 100644
--- a/src/soc/intel/broadwell/include/soc/me.h
+++ b/src/soc/intel/broadwell/include/soc/me.h
@@ -16,7 +16,6 @@
#ifndef _BROADWELL_ME_H_
#define _BROADWELL_ME_H_
-#include <compiler.h>
#include <commonlib/loglevel.h>
#define ME_RETRY 100000 /* 1 second */
diff --git a/src/soc/intel/broadwell/include/soc/nvs.h b/src/soc/intel/broadwell/include/soc/nvs.h
index 2e51e1bd20..63c7bde23b 100644
--- a/src/soc/intel/broadwell/include/soc/nvs.h
+++ b/src/soc/intel/broadwell/include/soc/nvs.h
@@ -18,7 +18,6 @@
#define _BROADWELL_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <soc/device_nvs.h>
#include <vendorcode/google/chromeos/gnvs.h>
diff --git a/src/soc/intel/broadwell/include/soc/pei_data.h b/src/soc/intel/broadwell/include/soc/pei_data.h
index d12011e797..989ca06733 100644
--- a/src/soc/intel/broadwell/include/soc/pei_data.h
+++ b/src/soc/intel/broadwell/include/soc/pei_data.h
@@ -30,7 +30,6 @@
#define PEI_DATA_H
#include <types.h>
-#include <compiler.h>
#define PEI_VERSION 22
diff --git a/src/soc/intel/broadwell/include/soc/smm.h b/src/soc/intel/broadwell/include/soc/smm.h
index 9a749c9051..75e78337c2 100644
--- a/src/soc/intel/broadwell/include/soc/smm.h
+++ b/src/soc/intel/broadwell/include/soc/smm.h
@@ -17,7 +17,6 @@
#define _BROADWELL_SMM_H_
#include <stdint.h>
-#include <compiler.h>
#include <cpu/x86/msr.h>
struct ied_header {
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 142f3b3375..a6691ab9f9 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -20,7 +20,6 @@
#include <arch/cbfs.h>
#include <arch/early_variables.h>
#include <bootmode.h>
-#include <compiler.h>
#include <console/console.h>
#include <cbfs.h>
#include <cbmem.h>
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index 7d862f250d..2b2d603b68 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -13,7 +13,6 @@
/* This file is derived from the flashrom project. */
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
#include <bootstate.h>
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c
index 014805f593..6a3324b7fd 100644
--- a/src/soc/intel/cannonlake/chip.c
+++ b/src/soc/intel/cannonlake/chip.c
@@ -14,7 +14,6 @@
*/
#include <chip.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index cbc97b22cd..9befdc8fda 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -14,7 +14,6 @@
*/
#include <chip.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
diff --git a/src/soc/intel/cannonlake/include/soc/nvs.h b/src/soc/intel/cannonlake/include/soc/nvs.h
index 1e5562566d..1cb22faa74 100644
--- a/src/soc/intel/cannonlake/include/soc/nvs.h
+++ b/src/soc/intel/cannonlake/include/soc/nvs.h
@@ -19,7 +19,6 @@
#define _SOC_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <vendorcode/google/chromeos/gnvs.h>
typedef struct global_nvs_t {
diff --git a/src/soc/intel/cannonlake/include/soc/pm.h b/src/soc/intel/cannonlake/include/soc/pm.h
index 1494d561d8..1661ece807 100644
--- a/src/soc/intel/cannonlake/include/soc/pm.h
+++ b/src/soc/intel/cannonlake/include/soc/pm.h
@@ -142,7 +142,6 @@
#include <arch/acpi.h>
#include <arch/io.h>
-#include <compiler.h>
#include <soc/gpe.h>
#include <soc/iomap.h>
#include <soc/smbus.h>
diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c
index 140fbff6a5..eae94cf6c5 100644
--- a/src/soc/intel/cannonlake/reset.c
+++ b/src/soc/intel/cannonlake/reset.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 6f610b6eec..246e0eac05 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -19,7 +19,6 @@
#include <chip.h>
#include <cpu/x86/mtrr.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <fsp/util.h>
#include <intelblocks/chip.h>
diff --git a/src/soc/intel/common/acpi_wake_source.c b/src/soc/intel/common/acpi_wake_source.c
index e0d8bfb8fc..f66706c4cd 100644
--- a/src/soc/intel/common/acpi_wake_source.c
+++ b/src/soc/intel/common/acpi_wake_source.c
@@ -16,7 +16,6 @@
#include <arch/acpi.h>
#include <bootstate.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <soc/nvs.h>
#include <stdint.h>
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index 8fdaeeeaa9..c2f0594283 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -18,7 +18,6 @@
#include <arch/smp/mpspec.h>
#include <bootstate.h>
#include <cbmem.h>
-#include <compiler.h>
#include <cpu/intel/reset.h>
#include <cpu/intel/turbo.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index dd5cc44845..af49c0a661 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -16,7 +16,6 @@
#include <arch/io.h>
#include <assert.h>
#include <bootstate.h>
-#include <compiler.h>
#include <cpu/cpu.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
diff --git a/src/soc/intel/common/block/ebda/ebda.c b/src/soc/intel/common/block/ebda/ebda.c
index 41c77a8f2c..6b0bd6752b 100644
--- a/src/soc/intel/common/block/ebda/ebda.c
+++ b/src/soc/intel/common/block/ebda/ebda.c
@@ -14,7 +14,6 @@
*/
#include <arch/ebda.h>
-#include <compiler.h>
#include <intelblocks/ebda.h>
#include <string.h>
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index 74a5cae4bb..47de26990e 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <assert.h>
#include <console/console.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c
index fc7dd46ad8..d4cb9f20ff 100644
--- a/src/soc/intel/common/block/gspi/gspi.c
+++ b/src/soc/intel/common/block/gspi/gspi.c
@@ -17,7 +17,6 @@
#include <arch/early_variables.h>
#include <arch/io.h>
#include <assert.h>
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index ef8417a195..dbea58927a 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c
index c8e8026171..0e975453fd 100644
--- a/src/soc/intel/common/block/pmc/pmc.c
+++ b/src/soc/intel/common/block/pmc/pmc.c
@@ -15,7 +15,6 @@
#include <arch/acpi.h>
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/pci.h>
diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c
index 3fb386642a..cfe8011458 100644
--- a/src/soc/intel/common/block/pmc/pmclib.c
+++ b/src/soc/intel/common/block/pmc/pmclib.c
@@ -16,7 +16,6 @@
#include <arch/early_variables.h>
#include <arch/io.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <halt.h>
#include <intelblocks/pmclib.h>
diff --git a/src/soc/intel/common/block/rtc/rtc.c b/src/soc/intel/common/block/rtc/rtc.c
index bfa11bd177..2d70de273b 100644
--- a/src/soc/intel/common/block/rtc/rtc.c
+++ b/src/soc/intel/common/block/rtc/rtc.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <intelblocks/pcr.h>
#include <intelblocks/rtc.h>
#include <soc/pcr_ids.h>
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index f90ac578e3..9e8d346d24 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -16,7 +16,6 @@
#include <arch/hlt.h>
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/cache.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/common/block/sram/sram.c b/src/soc/intel/common/block/sram/sram.c
index 9028952286..e38d47852a 100644
--- a/src/soc/intel/common/block/sram/sram.c
+++ b/src/soc/intel/common/block/sram/sram.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 225914c5b5..c25cab7ba5 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -15,7 +15,6 @@
#include <arch/io.h>
#include <cbmem.h>
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index 12b99e737e..d964b90b38 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -15,7 +15,6 @@
#include <arch/acpi.h>
#include <assert.h>
-#include <compiler.h>
#include <cbmem.h>
#include <console/uart.h>
#include <device/device.h>
diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c
index eb330ee6ee..119decd71f 100644
--- a/src/soc/intel/common/block/xdci/xdci.c
+++ b/src/soc/intel/common/block/xdci/xdci.c
@@ -15,7 +15,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c
index c38d19f034..0f4868a969 100644
--- a/src/soc/intel/common/block/xhci/xhci.c
+++ b/src/soc/intel/common/block/xhci/xhci.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c
index 541a7b4d43..77f8c1e227 100644
--- a/src/soc/intel/common/mma.c
+++ b/src/soc/intel/common/mma.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <bootstate.h>
#include <cbfs.h>
#include <cbmem.h>
diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c
index ab52dc8d04..9eaa2cb048 100644
--- a/src/soc/intel/common/vbt.c
+++ b/src/soc/intel/common/vbt.c
@@ -14,7 +14,6 @@
*/
#include <cbfs.h>
-#include <compiler.h>
#include <console/console.h>
#include <arch/acpi.h>
#include <bootmode.h>
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index 6a947ff83f..71e396004f 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -19,7 +19,6 @@
#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <arch/smp/mpspec.h>
-#include <compiler.h>
#include <cpu/x86/smm.h>
#include <string.h>
#include <device/pci.h>
diff --git a/src/soc/intel/denverton_ns/fiamux.c b/src/soc/intel/denverton_ns/fiamux.c
index 418ccfa322..fc18a41312 100644
--- a/src/soc/intel/denverton_ns/fiamux.c
+++ b/src/soc/intel/denverton_ns/fiamux.c
@@ -15,7 +15,6 @@
*
*/
-#include <compiler.h>
#include <console/console.h>
#include <soc/fiamux.h>
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index 3da349a63f..cf4ae7c1ed 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -15,7 +15,6 @@
*/
#include <cbmem.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/x86/mtrr.h>
#include <reset.h>
diff --git a/src/soc/intel/fsp_baytrail/gpio.c b/src/soc/intel/fsp_baytrail/gpio.c
index 72ba517d52..3cc69b9441 100644
--- a/src/soc/intel/fsp_baytrail/gpio.c
+++ b/src/soc/intel/fsp_baytrail/gpio.c
@@ -14,7 +14,6 @@
*/
#include <device/pci.h>
-#include <compiler.h>
#include <console/console.h>
#include <soc/gpio.h>
#include <soc/pmc.h>
diff --git a/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h b/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h
index 8eff8cdb6f..ec1e568bfd 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h
@@ -17,7 +17,6 @@
#define _BAYTRAIL_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define LPSS_NVS_SIO_DMA1 0
#define LPSS_NVS_I2C1 1
diff --git a/src/soc/intel/fsp_baytrail/include/soc/gpio.h b/src/soc/intel/fsp_baytrail/include/soc/gpio.h
index 767755454b..13013db121 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/gpio.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/gpio.h
@@ -17,7 +17,6 @@
#define _BAYTRAIL_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/io.h>
#include <soc/iomap.h>
diff --git a/src/soc/intel/fsp_baytrail/include/soc/nvs.h b/src/soc/intel/fsp_baytrail/include/soc/nvs.h
index f0bf888add..d42763a5ac 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/nvs.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/nvs.h
@@ -17,7 +17,6 @@
#ifndef _BAYTRAIL_NVS_H_
#define _BAYTRAIL_NVS_H_
-#include <compiler.h>
#include <soc/device_nvs.h>
typedef struct {
diff --git a/src/soc/intel/fsp_baytrail/include/soc/pmc.h b/src/soc/intel/fsp_baytrail/include/soc/pmc.h
index 9bafdc2fcf..b28b195c87 100644
--- a/src/soc/intel/fsp_baytrail/include/soc/pmc.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/pmc.h
@@ -17,7 +17,6 @@
#ifndef _BAYTRAIL_PMC_H_
#define _BAYTRAIL_PMC_H_
-#include <compiler.h>
#include <arch/acpi.h>
#define IOCOM1 0x3f8
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index d8b1d55397..26d2281a68 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -16,7 +16,6 @@
/* This file is derived from the flashrom project. */
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
#include <commonlib/helpers.h>
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h b/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h
index 07deeb08d6..1159d03910 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h
@@ -16,7 +16,6 @@
#define FSP_BROADWELL_DE_GPIO_H_
#include <stdint.h>
-#include <compiler.h>
/* Chipset owned GPIO configuration registers */
#define GPIO_1_USE_SEL 0x00
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/smm.h b/src/soc/intel/fsp_broadwell_de/include/soc/smm.h
index 2a737aca18..505feaf66d 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/smm.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/smm.h
@@ -18,7 +18,6 @@
#define _BROADWELL_SMM_H_
#include <stdint.h>
-#include <compiler.h>
#include <cpu/x86/msr.h>
struct ied_header {
diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c
index 1b1589db5b..a778aa927a 100644
--- a/src/soc/intel/fsp_broadwell_de/spi.c
+++ b/src/soc/intel/fsp_broadwell_de/spi.c
@@ -16,7 +16,6 @@
/* This file is derived from the flashrom project. */
#include <stdint.h>
-#include <compiler.h>
#include <stdlib.h>
#include <string.h>
#include <delay.h>
diff --git a/src/soc/intel/quark/gpio_i2c.c b/src/soc/intel/quark/gpio_i2c.c
index 100257bd7a..b2bb572800 100644
--- a/src/soc/intel/quark/gpio_i2c.c
+++ b/src/soc/intel/quark/gpio_i2c.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
diff --git a/src/soc/intel/quark/include/soc/pei_wrapper.h b/src/soc/intel/quark/include/soc/pei_wrapper.h
index 9e63a72ead..c177c86e9a 100644
--- a/src/soc/intel/quark/include/soc/pei_wrapper.h
+++ b/src/soc/intel/quark/include/soc/pei_wrapper.h
@@ -31,7 +31,6 @@
#define _PEI_WRAPPER_H_
#include <types.h>
-#include <compiler.h>
#define PEI_VERSION 22
diff --git a/src/soc/intel/quark/include/soc/pm.h b/src/soc/intel/quark/include/soc/pm.h
index ae19cc6c9d..c682a24300 100644
--- a/src/soc/intel/quark/include/soc/pm.h
+++ b/src/soc/intel/quark/include/soc/pm.h
@@ -18,7 +18,6 @@
#define _SOC_PM_H_
#include <stdint.h>
-#include <compiler.h>
#include <arch/acpi.h>
struct chipset_power_state {
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index d2ec7e7185..86dcc48e20 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -23,7 +23,6 @@
#include <arch/smp/mpspec.h>
#include <cbmem.h>
#include <chip.h>
-#include <compiler.h>
#include <console/console.h>
#include <cpu/cpu.h>
#include <cpu/x86/smm.h>
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index c2c0745565..039d45a507 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -21,7 +21,6 @@
#include <arch/acpi.h>
#include <arch/io.h>
#include <chip.h>
-#include <compiler.h>
#include <bootstate.h>
#include <console/console.h>
#include <device/device.h>
diff --git a/src/soc/intel/skylake/include/soc/device_nvs.h b/src/soc/intel/skylake/include/soc/device_nvs.h
index 2b7d1267fc..4dbc99a075 100644
--- a/src/soc/intel/skylake/include/soc/device_nvs.h
+++ b/src/soc/intel/skylake/include/soc/device_nvs.h
@@ -18,7 +18,6 @@
#define _SOC_DEVICE_NVS_H_
#include <stdint.h>
-#include <compiler.h>
#define SIO_NVS_I2C0 0
#define SIO_NVS_I2C1 1
diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h
index 590bfb722d..5a9acd51f3 100644
--- a/src/soc/intel/skylake/include/soc/me.h
+++ b/src/soc/intel/skylake/include/soc/me.h
@@ -18,8 +18,6 @@
#ifndef _SKYLAKE_ME_H_
#define _SKYLAKE_ME_H_
-#include <compiler.h>
-
/*
* Management Engine PCI registers
*/
diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h
index 53fdded8e9..7102a78a32 100644
--- a/src/soc/intel/skylake/include/soc/nvs.h
+++ b/src/soc/intel/skylake/include/soc/nvs.h
@@ -19,7 +19,6 @@
#define _SOC_NVS_H_
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <rules.h>
#include <vendorcode/google/chromeos/gnvs.h>
diff --git a/src/soc/intel/skylake/include/soc/pei_data.h b/src/soc/intel/skylake/include/soc/pei_data.h
index 58485837c6..02e04c6c02 100644
--- a/src/soc/intel/skylake/include/soc/pei_data.h
+++ b/src/soc/intel/skylake/include/soc/pei_data.h
@@ -31,7 +31,6 @@
#define _PEI_DATA_H_
#include <types.h>
-#include <compiler.h>
#define PEI_VERSION 22
diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h
index b7d6446543..47e3941531 100644
--- a/src/soc/intel/skylake/include/soc/pm.h
+++ b/src/soc/intel/skylake/include/soc/pm.h
@@ -17,7 +17,6 @@
#ifndef _SOC_PM_H_
#define _SOC_PM_H_
-#include <compiler.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <soc/gpe.h>
diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h
index 0f857e05ce..8195440952 100644
--- a/src/soc/intel/skylake/include/soc/smm.h
+++ b/src/soc/intel/skylake/include/soc/smm.h
@@ -18,7 +18,6 @@
#define _SOC_SMM_H_
#include <stdint.h>
-#include <compiler.h>
#include <cpu/x86/msr.h>
#include <fsp/memmap.h>
#include <intelblocks/smihandler.h>
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
index 5a4fe6b629..6baa568efa 100644
--- a/src/soc/intel/skylake/me.c
+++ b/src/soc/intel/skylake/me.c
@@ -16,7 +16,6 @@
#include <arch/io.h>
#include <bootstate.h>
#include <commonlib/helpers.h>
-#include <compiler.h>
#include <console/console.h>
#include <device/pci.h>
#include <device/pci_ids.h>
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 45fb2d0ef3..0945780c9f 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -18,7 +18,6 @@
#include <arch/io.h>
#include <arch/symbols.h>
#include <assert.h>
-#include <compiler.h>
#include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h>
#include <cbmem.h>
diff --git a/src/soc/mediatek/common/mmu_operations.c b/src/soc/mediatek/common/mmu_operations.c
index 27a03e3317..44670702de 100644
--- a/src/soc/mediatek/common/mmu_operations.c
+++ b/src/soc/mediatek/common/mmu_operations.c
@@ -14,7 +14,6 @@
*/
#include <arch/mmu.h>
-#include <compiler.h>
#include <symbols.h>
#include <soc/emi.h>
#include <soc/mmu_operations.h>
diff --git a/src/soc/mediatek/common/timer.c b/src/soc/mediatek/common/timer.c
index 6e4315c7cf..b05d29e0bf 100644
--- a/src/soc/mediatek/common/timer.c
+++ b/src/soc/mediatek/common/timer.c
@@ -14,7 +14,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <console/console.h>
#include <timer.h>
#include <delay.h>
diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c
index cfc469bed6..bc8053c6ab 100644
--- a/src/soc/mediatek/common/uart.c
+++ b/src/soc/mediatek/common/uart.c
@@ -19,7 +19,6 @@
#include <console/uart.h>
#include <drivers/uart/uart8250reg.h>
#include <stdint.h>
-#include <compiler.h>
#include <soc/addressmap.h>
diff --git a/src/soc/nvidia/tegra124/include/soc/clk_rst.h b/src/soc/nvidia/tegra124/include/soc/clk_rst.h
index 7cac4ba319..07e710a9f3 100644
--- a/src/soc/nvidia/tegra124/include/soc/clk_rst.h
+++ b/src/soc/nvidia/tegra124/include/soc/clk_rst.h
@@ -16,8 +16,6 @@
#ifndef _TEGRA124_CLK_RST_H_
#define _TEGRA124_CLK_RST_H_
-#include <compiler.h>
-
/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
struct __packed clk_rst_ctlr {
u32 rst_src; /* _RST_SOURCE, 0x000 */
diff --git a/src/soc/nvidia/tegra124/include/soc/dma.h b/src/soc/nvidia/tegra124/include/soc/dma.h
index 4cb1dea616..42c70275f5 100644
--- a/src/soc/nvidia/tegra124/include/soc/dma.h
+++ b/src/soc/nvidia/tegra124/include/soc/dma.h
@@ -19,7 +19,6 @@
#define __NVIDIA_TEGRA124_DMA_H__
#include <inttypes.h>
-#include <compiler.h>
#include <soc/addressmap.h>
/*
diff --git a/src/soc/nvidia/tegra124/include/soc/emc.h b/src/soc/nvidia/tegra124/include/soc/emc.h
index 1311f9efa2..8e190f9358 100644
--- a/src/soc/nvidia/tegra124/include/soc/emc.h
+++ b/src/soc/nvidia/tegra124/include/soc/emc.h
@@ -19,7 +19,6 @@
#include <stddef.h>
#include <stdint.h>
-#include <compiler.h>
enum {
EMC_PIN_RESET_MASK = 1 << 8,
diff --git a/src/soc/nvidia/tegra124/include/soc/spi.h b/src/soc/nvidia/tegra124/include/soc/spi.h
index 80ced37689..875e88032a 100644
--- a/src/soc/nvidia/tegra124/include/soc/spi.h
+++ b/src/soc/nvidia/tegra124/include/soc/spi.h
@@ -19,7 +19,6 @@
#include <spi-generic.h>
#include <soc/dma.h>
#include <stddef.h>
-#include <compiler.h>
struct tegra_spi_regs {
u32 command1; /* 0x000: SPI_COMMAND1 */
diff --git a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
index a8b2e69ea0..7cc320405a 100644
--- a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
+++ b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <compiler.h>
/* Function unit addresses. */
enum {
diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c
index 5cb8112d81..50c395658a 100644
--- a/src/soc/nvidia/tegra124/uart.c
+++ b/src/soc/nvidia/tegra124/uart.c
@@ -13,7 +13,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
#include <console/console.h> /* for __console definition */
diff --git a/src/soc/nvidia/tegra210/bootblock.c b/src/soc/nvidia/tegra210/bootblock.c
index 4d1ddf5d60..353644710d 100644
--- a/src/soc/nvidia/tegra210/bootblock.c
+++ b/src/soc/nvidia/tegra210/bootblock.c
@@ -17,7 +17,6 @@
#include <arch/hlt.h>
#include <arch/stages.h>
#include <bootblock_common.h>
-#include <compiler.h>
#include <console/console.h>
#include <delay.h>
#include <program_loading.h>
diff --git a/src/soc/nvidia/tegra210/funitcfg.c b/src/soc/nvidia/tegra210/funitcfg.c
index e8d0c9754d..b4319d59d6 100644
--- a/src/soc/nvidia/tegra210/funitcfg.c
+++ b/src/soc/nvidia/tegra210/funitcfg.c
@@ -14,7 +14,6 @@
*/
#include <arch/io.h>
-#include <compiler.h>
#include <soc/addressmap.h>
#include <soc/clock.h>
#include <soc/funitcfg.h>
diff --git a/src/soc/nvidia/tegra210/include/soc/clk_rst.h b/src/soc/nvidia/tegra210/include/soc/clk_rst.h
index 652bcaaf27..42eebedbc7 100644
--- a/src/soc/nvidia/tegra210/include/soc/clk_rst.h
+++ b/src/soc/nvidia/tegra210/include/soc/clk_rst.h
@@ -17,7 +17,6 @@
#define _TEGRA210_CLK_RST_H_
#include <stdint.h>
#include <stddef.h>
-#include <compiler.h>
/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
struct __packed clk_rst_ctlr {
diff --git a/src/soc/nvidia/tegra210/include/soc/clst_clk.h b/src/soc/nvidia/tegra210/include/soc/clst_clk.h
index 0b9b18dc06..661fd1d849 100644
--- a/src/soc/nvidia/tegra210/include/soc/clst_clk.h
+++ b/src/soc/nvidia/tegra210/include/soc/clst_clk.h
@@ -16,8 +16,6 @@
#ifndef _TEGRA210_CLST_CLK_H_
#define _TEGRA210_CLST_CLK_H_
-#include <compiler.h>
-
/* Cluster Clock (CLUSTER_CLOCKS_PUBLIC_) regs */
struct __packed clst_clk_ctlr {
u32 pllx_base; /* _PLLX_BASE, 0x000 */
diff --git a/src/soc/nvidia/tegra210/include/soc/dma.h b/src/soc/nvidia/tegra210/include/soc/dma.h
index f8bd92befd..1093479d5f 100644
--- a/src/soc/nvidia/tegra210/include/soc/dma.h
+++ b/src/soc/nvidia/tegra210/include/soc/dma.h
@@ -18,7 +18,6 @@
#define __NVIDIA_TEGRA210_DMA_H__
#include <inttypes.h>
-#include <compiler.h>
#include <soc/addressmap.h>
/*
diff --git a/src/soc/nvidia/tegra210/include/soc/emc.h b/src/soc/nvidia/tegra210/include/soc/emc.h
index 8ba23a0bb0..289aa72612 100644
--- a/src/soc/nvidia/tegra210/include/soc/emc.h
+++ b/src/soc/nvidia/tegra210/include/soc/emc.h
@@ -19,7 +19,6 @@
#include <stddef.h>
#include <stdint.h>
-#include <compiler.h>
enum {
EMC_PIN_RESET_MASK = 1 << 8,
diff --git a/src/soc/nvidia/tegra210/include/soc/spi.h b/src/soc/nvidia/tegra210/include/soc/spi.h
index 7508792d76..46c1c3c063 100644
--- a/src/soc/nvidia/tegra210/include/soc/spi.h
+++ b/src/soc/nvidia/tegra210/include/soc/spi.h
@@ -17,7 +17,6 @@
#ifndef __NVIDIA_TEGRA210_SPI_H__
#define __NVIDIA_TEGRA210_SPI_H__
-#include <compiler.h>
#include <soc/dma.h>
#include <spi-generic.h>
#include <stddef.h>
diff --git a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
index 108b3b07de..51e75f5da9 100644
--- a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
+++ b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c
@@ -15,7 +15,6 @@
*/
#include <stdint.h>
-#include <compiler.h>
/* Function unit addresses. */
enum {
diff --git a/src/soc/nvidia/tegra210/romstage.c b/src/soc/nvidia/tegra210/romstage.c
index 8958a6bb1e..07bf5d43f8 100644
--- a/src/soc/nvidia/tegra210/romstage.c
+++ b/src/soc/nvidia/tegra210/romstage.c
@@ -17,7 +17,6 @@
#include <arch/stages.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <compiler.h>
#include <console/cbmem_console.h>
#include <console/console.h>
#include <lib.h>
diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c
index 97dc740ebf..b7cec3d171 100644
--- a/src/soc/nvidia/tegra210/uart.c
+++ b/src/soc/nvidia/tegra210/uart.c
@@ -19,7 +19,6 @@
#include <console/uart.h>
#include <drivers/uart/uart8250reg.h>
#include <stdint.h>
-#include <compiler.h>
struct tegra210_uart {
union {
diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
index dbff384cd7..05a17c2e73 100644
--- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h
@@ -32,7 +32,6 @@
#define _IPQ40XX_CDP_H_
#include <types.h>
-#include <compiler.h>
unsigned smem_get_board_machtype(void);
diff --git a/src/soc/qualcomm/ipq40xx/lcc.c b/src/soc/qualcomm/ipq40xx/lcc.c
index 5d3738c1af..caddf19642 100644
--- a/src/soc/qualcomm/ipq40xx/lcc.c
+++ b/src/soc/qualcomm/ipq40xx/lcc.c
@@ -29,7 +29,6 @@
#include <stdlib.h>
#include <stdint.h>
-#include <compiler.h>
#include <delay.h>
#include <console/console.h>
#include <soc/clock.h>
diff --git a/src/soc/qualcomm/ipq806x/include/soc/cdp.h b/src/soc/qualcomm/ipq806x/include/soc/cdp.h
index f6afb313cc..89636ace18 100644
--- a/src/soc/qualcomm/ipq806x/include/soc/cdp.h
+++ b/src/soc/qualcomm/ipq806x/include/soc/cdp.h
@@ -17,7 +17,6 @@
#define _IPQ806X_CDP_H_
#include <types.h>
-#include <compiler.h>
unsigned smem_get_board_machtype(void);
diff --git a/src/soc/qualcomm/ipq806x/lcc.c b/src/soc/qualcomm/ipq806x/lcc.c
index 99994e928b..6aefea2351 100644
--- a/src/soc/qualcomm/ipq806x/lcc.c
+++ b/src/soc/qualcomm/ipq806x/lcc.c
@@ -29,7 +29,6 @@
#include <stdlib.h>
#include <stdint.h>
-#include <compiler.h>
#include <delay.h>
#include <console/console.h>
#include <soc/clock.h>
diff --git a/src/soc/samsung/exynos5250/i2c.c b/src/soc/samsung/exynos5250/i2c.c
index 19ef667896..f1bc3a41c9 100644
--- a/src/soc/samsung/exynos5250/i2c.c
+++ b/src/soc/samsung/exynos5250/i2c.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <arch/io.h>
#include <assert.h>
#include <console/console.h>
diff --git a/src/soc/samsung/exynos5250/include/soc/power.h b/src/soc/samsung/exynos5250/include/soc/power.h
index b5a4c33e1e..297ee19a4c 100644
--- a/src/soc/samsung/exynos5250/include/soc/power.h
+++ b/src/soc/samsung/exynos5250/include/soc/power.h
@@ -18,7 +18,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5250_POWER_H
#define CPU_SAMSUNG_EXYNOS5250_POWER_H
-#include <compiler.h>
#include <soc/cpu.h>
/* Enable HW thermal trip with PS_HOLD_CONTROL register ENABLE_HW_TRIP bit */
diff --git a/src/soc/samsung/exynos5420/i2c.c b/src/soc/samsung/exynos5420/i2c.c
index dd5ffd20d0..cef9f5d150 100644
--- a/src/soc/samsung/exynos5420/i2c.c
+++ b/src/soc/samsung/exynos5420/i2c.c
@@ -14,7 +14,6 @@
* GNU General Public License for more details.
*/
-#include <compiler.h>
#include <arch/io.h>
#include <assert.h>
#include <console/console.h>
diff --git a/src/soc/samsung/exynos5420/include/soc/dmc.h b/src/soc/samsung/exynos5420/include/soc/dmc.h
index b19b660936..e068255f96 100644
--- a/src/soc/samsung/exynos5420/include/soc/dmc.h
+++ b/src/soc/samsung/exynos5420/include/soc/dmc.h
@@ -14,8 +14,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5420_DMC_H
#define CPU_SAMSUNG_EXYNOS5420_DMC_H
-#include <compiler.h>
-
#define DMC_INTERLEAVE_SIZE 0x1f
#define PAD_RETENTION_DRAM_COREBLK_VAL 0x10000000
diff --git a/src/soc/samsung/exynos5420/include/soc/power.h b/src/soc/samsung/exynos5420/include/soc/power.h
index c5709a55e9..9b56fe5b1e 100644
--- a/src/soc/samsung/exynos5420/include/soc/power.h
+++ b/src/soc/samsung/exynos5420/include/soc/power.h
@@ -18,7 +18,6 @@
#ifndef CPU_SAMSUNG_EXYNOS5420_POWER_H
#define CPU_SAMSUNG_EXYNOS5420_POWER_H
-#include <compiler.h>
#include <soc/cpu.h>
/* Enable HW thermal trip with PS_HOLD_CONTROL register ENABLE_HW_TRIP bit */