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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-20 20:18:12 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-21 20:51:43 +0000
commitd27ef5bf6f5e444141dca6a89c46e667bca64652 (patch)
tree5625401e34f2a4f08175023de22172e4fa95589e /src/soc
parente0e49c858bc603ac8216cd3d87c6a4a9996a8083 (diff)
cpu/x86/mp_init: use cb_err as mp_init_with_smm return type
Using cb_err as return type clarifies the meaning of the different return values. This patch also adds the types.h include that provides the definition of the cb_err enum and checks the return value of mp_init_with_smm against the enum values instead of either checking if it's non-zero or less than zero to handle the error case. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ibcd4a9a63cc87fe176ba885ced0f00832587d492 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58491 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/cpu.c3
-rw-r--r--src/soc/amd/picasso/cpu.c3
-rw-r--r--src/soc/amd/stoneyridge/cpu.c3
-rw-r--r--src/soc/intel/alderlake/cpu.c3
-rw-r--r--src/soc/intel/apollolake/cpu.c3
-rw-r--r--src/soc/intel/baytrail/cpu.c3
-rw-r--r--src/soc/intel/braswell/cpu.c3
-rw-r--r--src/soc/intel/cannonlake/cpu.c3
-rw-r--r--src/soc/intel/denverton_ns/cpu.c3
-rw-r--r--src/soc/intel/elkhartlake/cpu.c3
-rw-r--r--src/soc/intel/icelake/cpu.c3
-rw-r--r--src/soc/intel/jasperlake/cpu.c3
-rw-r--r--src/soc/intel/skylake/cpu.c3
-rw-r--r--src/soc/intel/tigerlake/cpu.c3
-rw-r--r--src/soc/intel/xeon_sp/cpx/cpu.c3
-rw-r--r--src/soc/intel/xeon_sp/skx/cpu.c4
16 files changed, 32 insertions, 17 deletions
diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c
index 2ac30b6b9f..a2fa433a9b 100644
--- a/src/soc/amd/cezanne/cpu.c
+++ b/src/soc/amd/cezanne/cpu.c
@@ -15,6 +15,7 @@
#include <device/device.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
+#include <types.h>
_Static_assert(CONFIG_MAX_CPUS == 16, "Do not override MAX_CPUS. To reduce the number of "
"available cores, use the downcore_mode and disable_smt devicetree settings instead.");
@@ -51,7 +52,7 @@ static const struct mp_ops mp_ops = {
void mp_init_cpus(struct bus *cpu_bus)
{
/* Clear for take-off */
- if (mp_init_with_smm(cpu_bus, &mp_ops) < 0)
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* pre_mp_init made the flash not cacheable. Reset to WP for performance. */
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index b04d004f59..087b153998 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -19,6 +19,7 @@
#include <soc/iomap.h>
#include <console/console.h>
#include <cpu/amd/microcode.h>
+#include <types.h>
_Static_assert(CONFIG_MAX_CPUS == 8, "Do not override MAX_CPUS. To reduce the number of "
"available cores, use the downcore_mode and disable_smt devicetree settings instead.");
@@ -55,7 +56,7 @@ static const struct mp_ops mp_ops = {
void mp_init_cpus(struct bus *cpu_bus)
{
/* Clear for take-off */
- if (mp_init_with_smm(cpu_bus, &mp_ops) < 0)
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* pre_mp_init made the flash not cacheable. Reset to WP for performance. */
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 9283ff76e0..08f553351c 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -18,6 +18,7 @@
#include <soc/smi.h>
#include <soc/iomap.h>
#include <console/console.h>
+#include <types.h>
/*
* MP and SMM loading initialization.
@@ -53,7 +54,7 @@ static const struct mp_ops mp_ops = {
void mp_init_cpus(struct bus *cpu_bus)
{
/* Clear for take-off */
- if (mp_init_with_smm(cpu_bus, &mp_ops) < 0)
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* The flash is now no longer cacheable. Reset to WP for performance. */
diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c
index 801d10dd00..a437559107 100644
--- a/src/soc/intel/alderlake/cpu.c
+++ b/src/soc/intel/alderlake/cpu.c
@@ -23,6 +23,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -126,7 +127,7 @@ static const struct mp_ops mp_ops = {
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index f2b14d73f6..645582b132 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -28,6 +28,7 @@
#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
+#include <types.h>
static const struct reg_script core_msr_script[] = {
#if !CONFIG(SOC_INTEL_GEMINILAKE)
@@ -250,7 +251,7 @@ static const struct mp_ops mp_ops = {
void soc_init_cpus(struct bus *cpu_bus)
{
/* Clear for take-off */
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c
index e624240d92..8e402651ce 100644
--- a/src/soc/intel/baytrail/cpu.c
+++ b/src/soc/intel/baytrail/cpu.c
@@ -17,6 +17,7 @@
#include <soc/msr.h>
#include <soc/pattrs.h>
#include <soc/ramstage.h>
+#include <types.h>
/* Core level MSRs */
static const struct reg_script core_msr_script[] = {
@@ -196,6 +197,6 @@ void baytrail_init_cpus(struct device *dev)
{
struct bus *cpu_bus = dev->link_list;
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c
index 0c6f463438..ead42b92f8 100644
--- a/src/soc/intel/braswell/cpu.c
+++ b/src/soc/intel/braswell/cpu.c
@@ -17,6 +17,7 @@
#include <soc/msr.h>
#include <soc/pattrs.h>
#include <soc/ramstage.h>
+#include <types.h>
/* Core level MSRs */
static const struct reg_script core_msr_script[] = {
@@ -205,6 +206,6 @@ void soc_init_cpus(struct device *dev)
{
struct bus *cpu_bus = dev->link_list;
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index 8c8cad098e..23b944df2d 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -16,6 +16,7 @@
#include <cpu/x86/mtrr.h>
#include <cpu/intel/microcode.h>
#include <cpu/intel/common/common.h>
+#include <types.h>
#include "chip.h"
@@ -189,7 +190,7 @@ static const struct mp_ops mp_ops = {
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c
index 60635483d4..ab4043bf09 100644
--- a/src/soc/intel/denverton_ns/cpu.c
+++ b/src/soc/intel/denverton_ns/cpu.c
@@ -20,6 +20,7 @@
#include <soc/iomap.h>
#include <soc/smm.h>
#include <soc/soc_util.h>
+#include <types.h>
static struct smm_relocation_attrs relo_attrs;
@@ -296,6 +297,6 @@ void denverton_init_cpus(struct device *dev)
add_more_links(dev, 1);
/* Clear for take-off */
- if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)
+ if (mp_init_with_smm(dev->link_list, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/elkhartlake/cpu.c b/src/soc/intel/elkhartlake/cpu.c
index 0788c679f3..bfbb87f804 100644
--- a/src/soc/intel/elkhartlake/cpu.c
+++ b/src/soc/intel/elkhartlake/cpu.c
@@ -16,6 +16,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -117,7 +118,7 @@ static const struct mp_ops mp_ops = {
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/icelake/cpu.c b/src/soc/intel/icelake/cpu.c
index 3ca2172212..dea75b6ed4 100644
--- a/src/soc/intel/icelake/cpu.c
+++ b/src/soc/intel/icelake/cpu.c
@@ -16,6 +16,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -153,6 +154,6 @@ static const struct mp_ops mp_ops = {
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
}
diff --git a/src/soc/intel/jasperlake/cpu.c b/src/soc/intel/jasperlake/cpu.c
index a58fe55969..18194c99a2 100644
--- a/src/soc/intel/jasperlake/cpu.c
+++ b/src/soc/intel/jasperlake/cpu.c
@@ -16,6 +16,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -119,7 +120,7 @@ static const struct mp_ops mp_ops = {
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 3abf19b747..80bf251cc0 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -22,6 +22,7 @@
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
#include <soc/systemagent.h>
+#include <types.h>
#include "chip.h"
@@ -211,7 +212,7 @@ static const struct mp_ops mp_ops = {
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/tigerlake/cpu.c b/src/soc/intel/tigerlake/cpu.c
index 084b5d6484..f10f0cf85d 100644
--- a/src/soc/intel/tigerlake/cpu.c
+++ b/src/soc/intel/tigerlake/cpu.c
@@ -22,6 +22,7 @@
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/soc_chip.h>
+#include <types.h>
static void soc_fsp_load(void)
{
@@ -125,7 +126,7 @@ static const struct mp_ops mp_ops = {
void soc_init_cpus(struct bus *cpu_bus)
{
- if (mp_init_with_smm(cpu_bus, &mp_ops))
+ if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* Thermal throttle activation offset */
diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c
index cfd9e5c153..9746972a38 100644
--- a/src/soc/intel/xeon_sp/cpx/cpu.c
+++ b/src/soc/intel/xeon_sp/cpx/cpu.c
@@ -24,6 +24,7 @@
#include <soc/smmrelocate.h>
#include <soc/soc_util.h>
#include <soc/util.h>
+#include <types.h>
#include "chip.h"
@@ -211,7 +212,7 @@ void cpx_init_cpus(struct device *dev)
intel_microcode_load_unlocked(microcode_patch);
- if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)
+ if (mp_init_with_smm(dev->link_list, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/*
diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c
index df2b9b3a00..4d01740656 100644
--- a/src/soc/intel/xeon_sp/skx/cpu.c
+++ b/src/soc/intel/xeon_sp/skx/cpu.c
@@ -16,7 +16,7 @@
#include "chip.h"
#include <cpu/intel/smm_reloc.h>
#include <cpu/intel/em64t101_save_state.h>
-
+#include <types.h>
static const config_t *chip_config = NULL;
@@ -231,7 +231,7 @@ void xeon_sp_init_cpus(struct device *dev)
config_reset_cpl3_csrs();
/* calls src/cpu/x86/mp_init.c */
- if (mp_init_with_smm(dev->link_list, &mp_ops) < 0)
+ if (mp_init_with_smm(dev->link_list, &mp_ops) != CB_SUCCESS)
printk(BIOS_ERR, "MP initialization failure.\n");
/* update numa domain for all cpu devices */