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authorArthur Heymans <arthur@aheymans.xyz>2021-09-08 07:45:23 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-09-23 06:37:38 +0000
commitcbc609957fb8feedc7eb7795a3324cf364c178f1 (patch)
treeeef08338f05bb1304899f488ea5ffd4100cc016f /src/soc
parentbf46ba5adbd7cec13986d8b6584a2a14bfc9109e (diff)
soc/intel/xeon_sp/cpx: Rename FSP UPDs using CPP
coreboot expects different names for FSP UPDs so use some CPP to make it happy. Change-Id: I4b2c2dd6ba40cb58bc2089eb9204fd4f70b037aa Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57487 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/xeon_sp/cpx/Makefile.inc2
-rw-r--r--src/soc/intel/xeon_sp/cpx/include/soc/fsp_upd.h11
2 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc
index ac8d837322..67d7584ac5 100644
--- a/src/soc/intel/xeon_sp/cpx/Makefile.inc
+++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc
@@ -17,6 +17,8 @@ ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c
CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/cpx/include -I$(src)/soc/intel/xeon_sp/cpx
+CPPFLAGS_common += -include $(src)/soc/intel/xeon_sp/cpx/include/soc/fsp_upd.h
+
cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-55-0b
endif ## CONFIG_SOC_INTEL_COOPERLAKE_SP
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/fsp_upd.h b/src/soc/intel/xeon_sp/cpx/include/soc/fsp_upd.h
new file mode 100644
index 0000000000..55b2e990db
--- /dev/null
+++ b/src/soc/intel/xeon_sp/cpx/include/soc/fsp_upd.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef _FSP_UPD_H_
+#define _FSP_UPD_H_
+
+/* Rename the FSP UPD structs to what they were historically called on other platforms. */
+#define FSP_T_CONFIG FSPT_CONFIG
+#define FSP_M_CONFIG FSPM_CONFIG
+#define FSP_S_CONFIG FSPS_CONFIG
+
+#endif