diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-03-21 08:05:03 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-03-23 18:05:34 +0000 |
| commit | cb92d28d7a22811f5399c589e5b231508ff42370 (patch) | |
| tree | 6d2915cf77ddf5d1b2b11e040023e1f378a7954f /src/soc | |
| parent | 2b24fc7c56da2fe23a3a94def166ff2872d058d5 (diff) | |
soc/intel/xeon_sp/spr: Move XHCI code into southbridge folder
Move the XHCI code into soc/intel/xeon_sp/ebg where it belongs.
TEST=intel/archercity CRB
Change-Id: I2206ec5426a0f922cfce0e2d968e6806d349a6b2
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81370
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/xeon_sp/ebg/Makefile.mk | 2 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/ebg/include/soc/xhci.h (renamed from src/soc/intel/xeon_sp/spr/include/soc/xhci.h) | 0 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/ebg/soc_xhci.c (renamed from src/soc/intel/xeon_sp/spr/xhci.c) | 5 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/Makefile.mk | 2 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h | 3 |
5 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/xeon_sp/ebg/Makefile.mk b/src/soc/intel/xeon_sp/ebg/Makefile.mk index ac73acbde9..b05c05bbb3 100644 --- a/src/soc/intel/xeon_sp/ebg/Makefile.mk +++ b/src/soc/intel/xeon_sp/ebg/Makefile.mk @@ -2,6 +2,6 @@ bootblock-y += soc_gpio.c soc_pch.c romstage-y += soc_gpio.c soc_pmutil.c soc_pch.c -ramstage-y += lockdown.c soc_gpio.c soc_pch.c soc_pmutil.c +ramstage-y += lockdown.c soc_gpio.c soc_pch.c soc_pmutil.c soc_xhci.c CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/ebg/include diff --git a/src/soc/intel/xeon_sp/spr/include/soc/xhci.h b/src/soc/intel/xeon_sp/ebg/include/soc/xhci.h index 005a8e1b0b..005a8e1b0b 100644 --- a/src/soc/intel/xeon_sp/spr/include/soc/xhci.h +++ b/src/soc/intel/xeon_sp/ebg/include/soc/xhci.h diff --git a/src/soc/intel/xeon_sp/spr/xhci.c b/src/soc/intel/xeon_sp/ebg/soc_xhci.c index 544ea16ba9..f8aa37b88d 100644 --- a/src/soc/intel/xeon_sp/spr/xhci.c +++ b/src/soc/intel/xeon_sp/ebg/soc_xhci.c @@ -2,10 +2,13 @@ #include <console/console.h> #include <device/pci.h> -#include <soc/pci_devs.h> +#include <soc/pch_pci_devs.h> #include <soc/xhci.h> #include <types.h> +// XHCI register +#define SYS_BUS_CFG2 0x44 + static uint8_t *get_xhci_bar(void) { const struct resource *res; diff --git a/src/soc/intel/xeon_sp/spr/Makefile.mk b/src/soc/intel/xeon_sp/spr/Makefile.mk index 163b5ea94d..fc8ab1713d 100644 --- a/src/soc/intel/xeon_sp/spr/Makefile.mk +++ b/src/soc/intel/xeon_sp/spr/Makefile.mk @@ -12,7 +12,7 @@ romstage-y += romstage.c soc_util.c ddr.c romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c -ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c xhci.c reset.c +ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c reset.c ramstage-y += crashlog.c ioat.c ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c diff --git a/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h index 09953aa76a..510a67fa6f 100644 --- a/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h +++ b/src/soc/intel/xeon_sp/spr/include/soc/pci_devs.h @@ -122,9 +122,6 @@ #define IIO_DFX_TSWCTL0 0x30c #define IIO_DFX_LCK_CTL 0x504 -// XHCI register -#define SYS_BUS_CFG2 0x44 - /* MSM registers */ #define MSM_BUS 0xF2 #define MSM_DEV 3 |