diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2022-01-13 19:05:27 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-27 23:04:04 +0000 |
| commit | bc1febad5b6acef70f4fc98542261e95c4849354 (patch) | |
| tree | 5152afc3a377bef7c84537053437b971c18a7b12 /src/soc | |
| parent | ba21a1f76c363f752b82c569b787bfde3337535e (diff) | |
soc/amd/sabrina/include/southbridge: add new I2C_PAD_CTRL bits
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iac1b7308851c34bd1556c02af6b270e9346073e4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61098
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/sabrina/include/soc/southbridge.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/sabrina/include/soc/southbridge.h b/src/soc/amd/sabrina/include/soc/southbridge.h index 869af0bc87..4b25c5eda6 100644 --- a/src/soc/amd/sabrina/include/soc/southbridge.h +++ b/src/soc/amd/sabrina/include/soc/southbridge.h @@ -139,6 +139,9 @@ #define I2C_PAD_CTRL_BIAS_CRT_EN BIT(16) #define I2C_PAD_CTRL_SPARE0 BIT(17) #define I2C_PAD_CTRL_SPARE1 BIT(18) +#define I2C_PAD_CTRL_PD_EN BIT(19) +#define I2C_PAD_CTRL_COMP_SEL BIT(20) +#define I2C_PAD_CTRL_RES_BIAS_EN BIT(21) void fch_pre_init(void); void fch_early_init(void); |