diff options
| author | Jonathan Zhang <jonzhang@meta.com> | 2023-01-26 15:02:43 -0800 |
|---|---|---|
| committer | David Hendricks <david.hendricks@gmail.com> | 2023-02-19 23:01:39 +0000 |
| commit | b64fdcc0fab3d77a94a2053dd1231c60a2b5dc77 (patch) | |
| tree | 295a2e6d35d974fc65e4b7d23fa94e9f049daae9 /src/soc | |
| parent | 17d9d897f0372cdabb69ddac5f25afe2e4c0bfed (diff) | |
soc/intel/common/block/fast_spi: Add SPI Vendor Component Lock
Add fast_spi_set_vcl() to be called by the SOC lockdown function if SPI
Vendor Specific Component Capabilities are desired.
Change-Id: I6d9b58e90fa16c539b90c6b961862e97e1bf29a2
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72478
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 11 | ||||
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi_def.h | 7 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/fast_spi.h | 4 |
3 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 4fa10b0bb7..e8b2c3a7f2 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -464,6 +464,17 @@ void fast_spi_set_bde(void) pci_or_config32(dev, SPI_BIOS_DECODE_EN, SPI_BIOS_DECODE_LOCK); } +/* Set FAST_SPIBAR + SPIBAR_SFDP0_VSCC0 (0xc4) Vendor Control Lock */ +void fast_spi_set_vcl(void) +{ + void *spibar = fast_spi_get_bar(); + uint32_t vcss; + + vcss = read32(spibar + SPIBAR_SFDP0_VSCC0); + vcss |= SPIBAR_SFDP0_VSCC0_VCL; + write32(spibar + SPIBAR_SFDP0_VSCC0, vcss); +} + void fast_spi_clear_outstanding_status(void) { void *spibar = fast_spi_get_bar(); diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_def.h b/src/soc/intel/common/block/fast_spi/fast_spi_def.h index af46ccb964..cc1cdaa70c 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi_def.h +++ b/src/soc/intel/common/block/fast_spi/fast_spi_def.h @@ -39,6 +39,7 @@ #define SPIBAR_OPMENU_UPPER 0xac #define SPIBAR_FDOC 0xb4 #define SPIBAR_FDOD 0xb8 +#define SPIBAR_SFDP0_VSCC0 0xc4 #define SPIBAR_PTINX 0xcc #define SPIBAR_PTDATA 0xd0 @@ -134,6 +135,12 @@ #define SPI_OPPREFIX ((0x50 << 8) | 0x06) /* EWSR and WREN */ /* + * Spi Flash Vendor Specific Component Capabilities + * for Component 0 (0xc4) register + */ +#define SPIBAR_SFDP0_VSCC0_VCL (1 << 30) + +/* * Register Offset of BIOS Vendor Specific Component Capabilities (VSCC) * for Component 0 Register */ diff --git a/src/soc/intel/common/block/include/intelblocks/fast_spi.h b/src/soc/intel/common/block/include/intelblocks/fast_spi.h index 716f16a07a..46b4f48693 100644 --- a/src/soc/intel/common/block/include/intelblocks/fast_spi.h +++ b/src/soc/intel/common/block/include/intelblocks/fast_spi.h @@ -107,5 +107,9 @@ void fast_spi_cache_ext_bios_postcar(struct postcar_frame *pcf); * Set FAST_SPIBAR BIOS Decode Lock bit */ void fast_spi_set_bde(void); +/* + * Set FAST_SPIBAR Vendor Component Lock bit. + */ +void fast_spi_set_vcl(void); #endif /* SOC_INTEL_COMMON_BLOCK_FAST_SPI_H */ |