diff options
author | Subrata Banik <subratabanik@google.com> | 2023-04-13 19:05:11 +0530 |
---|---|---|
committer | Arthur Heymans <arthur@aheymans.xyz> | 2023-04-14 14:45:12 +0000 |
commit | ae0c84f987f37a79bfc6021f9ab4e8b53a7b3440 (patch) | |
tree | 0fdb2cdf3775c8f4d2f51b81502f6c542b523977 /src/soc | |
parent | 0db0d20c003d5e21f95dbeebe87229798ab104b1 (diff) |
soc/intel/cannonlake: Allow SoC to choose CAR mode (eNEM/NEM)
This patch avoids cannonlake base config to select eNEM for CAR by
default. Rather allow other SoC config to choose the applicable CAR
mode between eNEM and NEM.
CML and WHL select eNEM whereas CFL decided to use NEM for CAR setup.
Here is some background about why CFL SoC platform decided to choose
NEM over eNEM:
It was found that some coffeelake CPUs like Intel i3 9100E fail to enter
CAR mode because some MSR used by NEM enhanced are lacking. According to
the Intel SDM CPUID.EAX=07h.ECX=0 reg EBX[12 or 15] should indicate the
presence of IA32_PAR_ASSOC and CPUID.EAX=10h.ECX[1 or 2] reg ECX[2]
should indicate IA32_L3_QOS_CFG and IA32_L2_QOS_CFG respectively but
even on a Intel coffeelake CPU that works with the NEM_ENHANCED these
CPUID bits are all 0 so there is no way of knowing whether NEM_ENHANCED
will work at runtime. Instead just always use regular NEM.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ibeaa4d53279ff9cbcd0b2ac5f2ad71925872355b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74377
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index c4855da7ff..33025eba52 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -8,6 +8,7 @@ config SOC_INTEL_COFFEELAKE select HAVE_EXP_X86_64_SUPPORT select HAVE_INTEL_FSP_REPO select HECI_DISABLE_USING_SMM + select INTEL_CAR_NEM select SOC_INTEL_CONFIGURE_DDI_A_4_LANES config SOC_INTEL_WHISKEYLAKE @@ -16,6 +17,7 @@ config SOC_INTEL_WHISKEYLAKE select FSP_USES_CB_STACK select HAVE_INTEL_FSP_REPO select HECI_DISABLE_USING_SMM + select INTEL_CAR_NEM_ENHANCED select SOC_INTEL_CONFIGURE_DDI_A_4_LANES config SOC_INTEL_COMETLAKE @@ -23,6 +25,7 @@ config SOC_INTEL_COMETLAKE select SOC_INTEL_CANNONLAKE_BASE select FSP_USES_CB_STACK select HAVE_INTEL_FSP_REPO + select INTEL_CAR_NEM_ENHANCED select PMC_IPC_ACPI_INTERFACE if DISABLE_HECI1_AT_PRE_BOOT select SOC_INTEL_CONFIGURE_DDI_A_4_LANES select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC @@ -71,7 +74,6 @@ config CPU_SPECIFIC_OPTIONS select HAVE_HYPERTHREADING select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE - select INTEL_CAR_NEM_ENHANCED select INTEL_DESCRIPTOR_MODE_CAPABLE select INTEL_GMA_ACPI select INTEL_GMA_ADD_VBT if RUN_FSP_GOP |