diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-06-23 17:22:51 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-06-26 05:32:28 +0000 |
| commit | acd60c9effbd04a9913e78f9afb4d0e545044e51 (patch) | |
| tree | 25116cf596af6d2d2198e3035065680dc92ea87b /src/soc | |
| parent | 5c4921c0384d8d8b17a842dcaff0ac9f5fb3beed (diff) | |
soc/intel/alderlake: Drop debug interface selection
This patch drops FSP Debug interface selection as coreboot now decides
the UART inerface to redirect the debug msg.
BUG=none
TEST=Able to see all coreboot and FSP debug log with and without this
patch.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: If8c07d7e63c5d445fdb77ac38b99217bf015e15f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65359
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/alderlake/chip.h | 9 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 3 |
2 files changed, 0 insertions, 12 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index 00b3a07628..3088eaa1f6 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -353,15 +353,6 @@ struct soc_intel_alderlake_config { */ uint8_t serial_io_gspi_cs_state[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX]; - /* Debug interface selection */ - enum { - DEBUG_INTERFACE_RAM = (1 << 0), - DEBUG_INTERFACE_UART_8250IO = (1 << 1), - DEBUG_INTERFACE_USB3 = (1 << 3), - DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4), - DEBUG_INTERFACE_TRACEHUB = (1 << 5), - } debug_interface_flag; - /* Enable Pch iSCLK */ uint8_t pch_isclk; diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 82fb67cda2..f8bdb41f2a 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -177,9 +177,6 @@ static void fill_fspm_security_params(FSP_M_CONFIG *m_cfg, static void fill_fspm_uart_params(FSP_M_CONFIG *m_cfg, const struct soc_intel_alderlake_config *config) { - /* UART Debug Log */ - m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? - DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO; if (CONFIG(DRIVERS_UART_8250IO)) m_cfg->PcdIsaSerialUartBase = ISA_SERIAL_BASE_ADDR_3F8; m_cfg->SerialIoUartDebugMode = PchSerialIoSkipInit; |