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authorTony Huang <tony-huang@quanta.corp-partner.google.com>2023-04-20 15:03:35 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-04-22 16:26:53 +0000
commitaad882474164b458bc89696d42134386e817e007 (patch)
tree73611c41859e3fe43ba16ad01e02987a4d3bc899 /src/soc
parent1c25808f0bd5509eb438063c26b58134d8f54ba9 (diff)
mb/google/nissa/var/yavilla: Generate SPD ID to aligen with yaviks
Yavilla board memory id setting references to yaviks. This CL aligen it with yaviks. DRAM Part Name ID to assign MT62F512M32D2DR-031 WT:B 0 (0000) MT62F1G32D4DR-031 WT:B 1 (0001) H9JCNNNBK3MLYR-N6E 0 (0000) H58G56AK6BX069 2 (0010) K3LKBKB0BM-MGCP 2 (0010) H58G56BK7BX068 3 (0011) MT62F1G32D2DS-026 WT:B 3 (0011) K3KL8L80CM-MGCT 3 (0011) H58G66BK7BX067 4 (0100) MT62F2G32D4DS-026 WT:B 4 (0100) K3KL9L90CM-MGCT 4 (0100) H58G66AK6BX070 5 (0101) BUG=b:273791621 BRANCH=firmware-nissa-15217.B TEST=run part_id_gen to generate SPD id Change-Id: I4a5eb9e6e87a4adbc23f94f0eb92d5452c50e47c Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74584 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kevin Chiu <kevin.chiu.17802@gmail.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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