diff options
| author | Marc Jones <marcj303@gmail.com> | 2017-09-20 17:09:19 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-09-27 02:53:54 +0000 |
| commit | 9cffe25ce0b06a19e3e18978ea83e006f64886a2 (patch) | |
| tree | 75e79013409cf17d80ffa61d06c56a3a4170e3b5 /src/soc | |
| parent | 469c01ebd2ae0464d469496ecf156b4559a3f506 (diff) | |
google/kahlee: Fix GPIO ASL
Use a single define and set the CROS GPIO ASL device to match the
Stoney Ridge GPIO HID. Update the GPIO number to 142. Also, add a DDN
field in the GPIO ASL. This addresses the TEST indicated below.
BUG=b:65597554
BRANCH=none
TEST=grep ^ /sys/devices/platform/chromeos_acpi/GPIO.*/* reports AMD0030.
Change-Id: I1d6c42c6c9a0eef25e0e99aed6d838c767f5e01f
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/21614
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/gpio.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h index 6378ca8580..734074aad6 100644 --- a/src/soc/amd/stoneyridge/include/soc/gpio.h +++ b/src/soc/amd/stoneyridge/include/soc/gpio.h @@ -16,11 +16,13 @@ #ifndef __STONEYRIDGE_GPIO_H__ #define __STONEYRIDGE_GPIO_H__ +#define GPIO_DEVICE_NAME "AMD0030" +#define GPIO_DEVICE_DESC "GPIO Controller" + +#ifndef __ACPI__ #include <soc/amd/common/amd_defs.h> #include <types.h> -#define CROS_GPIO_DEVICE_NAME "AmdKern" - #define GPIO_PIN_STS (1 << 16) #define GPIO_PULLUP_ENABLE (1 << 20) #define GPIO_PULLDOWN_ENABLE (1 << 21) @@ -132,5 +134,5 @@ #define GPIO_148 148 typedef uint32_t gpio_t; - +#endif /* __ACPI__ */ #endif /* __STONEYRIDGE_GPIO_H__ */ |