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authorVarshit Pandya <pandyavarshit@gmail.com>2023-10-04 19:30:21 +0530
committerFelix Held <felix-coreboot@felixheld.de>2023-10-11 17:49:00 +0000
commit95d78d9e421e627c5c346b4f1f5600998d71a591 (patch)
treeb185a093ce71d2337974c3efd7e24c947ade2b7d /src/soc
parentc0f19834f450171c60246a7526c2d53195a3c6ff (diff)
soc/amd/genoa: Add GPIO support
Change-Id: I2e827e9ffbb2ec1be0f1247b77660a9fdeb04f7b Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/78222 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/genoa/Kconfig1
-rw-r--r--src/soc/amd/genoa/Makefile.inc1
-rw-r--r--src/soc/amd/genoa/gpio.c38
3 files changed, 40 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Kconfig b/src/soc/amd/genoa/Kconfig
index 2d57906c45..b4caa5685f 100644
--- a/src/soc/amd/genoa/Kconfig
+++ b/src/soc/amd/genoa/Kconfig
@@ -11,6 +11,7 @@ config SOC_SPECIFIC_OPTIONS
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
select SOC_AMD_COMMON_BLOCK_AOAC
+ select SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
select SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H
select SOC_AMD_COMMON_BLOCK_HAS_ESPI
select SOC_AMD_COMMON_BLOCK_LPC
diff --git a/src/soc/amd/genoa/Makefile.inc b/src/soc/amd/genoa/Makefile.inc
index 2f7241d7c2..a35146cb1d 100644
--- a/src/soc/amd/genoa/Makefile.inc
+++ b/src/soc/amd/genoa/Makefile.inc
@@ -4,6 +4,7 @@ ifeq ($(CONFIG_SOC_AMD_GENOA),y)
all-y += mmap_boot.c
all-y += reset.c
all-y += config.c
+all-y += gpio.c
bootblock-y += early_fch.c
bootblock-y += aoac.c
diff --git a/src/soc/amd/genoa/gpio.c b/src/soc/amd/genoa/gpio.c
new file mode 100644
index 0000000000..52cf272285
--- /dev/null
+++ b/src/soc/amd/genoa/gpio.c
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/gpio.h>
+#include <soc/gpio.h>
+#include <types.h>
+
+/* see the IOMUX function table for the mapping from GPIO number to GEVENT number */
+static const struct soc_amd_event gpio_event_table[] = {
+ { GPIO_0, GEVENT_21 }, /* GPIO0 may only be used as PWR_BTN_L in ACPI */
+ { GPIO_1, GEVENT_19 },
+ { GPIO_2, GEVENT_8 },
+ { GPIO_3, GEVENT_2 },
+ { GPIO_4, GEVENT_4 },
+ { GPIO_5, GEVENT_7 },
+ { GPIO_6, GEVENT_10 },
+ { GPIO_16, GEVENT_12 },
+ { GPIO_17, GEVENT_13 },
+ { GPIO_21, GEVENT_5 },
+ { GPIO_22, GEVENT_3 },
+ { GPIO_23, GEVENT_16 },
+ { GPIO_24, GEVENT_14 },
+ { GPIO_26, GEVENT_15 },
+ { GPIO_76, GEVENT_11 },
+ { GPIO_86, GEVENT_9 },
+ { GPIO_89, GEVENT_0 },
+ { GPIO_104, GEVENT_20 },
+ { GPIO_105, GEVENT_22 },
+ { GPIO_106, GEVENT_23 },
+ { GPIO_115, GEVENT_1 },
+ { GPIO_116, GEVENT_6 },
+ { GPIO_129, GEVENT_17 },
+};
+
+void soc_get_gpio_event_table(const struct soc_amd_event **table, size_t *items)
+{
+ *table = gpio_event_table;
+ *items = ARRAY_SIZE(gpio_event_table);
+}