diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-02-02 16:53:50 -0700 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2023-02-03 18:23:46 +0000 |
| commit | 8c127ecc3c28a3188490af8daef43d528560ebd2 (patch) | |
| tree | c1958cda9eed30dd6f3a9231c65330e674ab6476 /src/soc | |
| parent | abce429dac446bbb7fb4a04c2f9727c639dbbed1 (diff) | |
soc/intel/alderlake: Add a missing RPL-P power limits configuration
This patch adds the {MCH:a706, TDP:28W} missing 28W configuration.
BUG=b:267666609
BRANCH=firmware-brya-14505.B
TEST=Power Limit are properly set on skolas 28W
Change-Id: Ice35d622eeec5799c53de086430d00dc8789097e
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72734
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/alderlake/chip.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index 5173b1cf03..8e76e555ec 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -133,6 +133,7 @@ static const struct { { PCI_DID_INTEL_ADL_S_ID_12, ADL_S_202_35W_CORE, TDP_35W }, { PCI_DID_INTEL_ADL_S_ID_12, ADL_S_202_46W_CORE, TDP_46W }, { PCI_DID_INTEL_RPL_P_ID_1, RPL_P_682_642_482_45W_CORE, TDP_45W }, + { PCI_DID_INTEL_RPL_P_ID_1, RPL_P_682_482_282_28W_CORE, TDP_28W }, { PCI_DID_INTEL_RPL_P_ID_2, RPL_P_682_482_282_28W_CORE, TDP_28W }, { PCI_DID_INTEL_RPL_P_ID_3, RPL_P_282_242_142_15W_CORE, TDP_15W }, { PCI_DID_INTEL_RPL_P_ID_4, RPL_P_282_242_142_15W_CORE, TDP_15W }, |