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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-01 21:42:33 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-04 11:40:12 +0000 |
| commit | 879c9fc4210fa508fdc7e23e6a53709d5751d513 (patch) | |
| tree | 5c9395950b320301196f4bd1c627d4feee177bd5 /src/soc | |
| parent | a09d33ec88bc5a43e78a23d5ccc8fb7a87fda362 (diff) | |
soc/nvidia/tegra210: Populate _cbmem_top_ptr
On this platform the ramstage is run on a different core so passing
cbmem_top via calling arguments is not an option. To work around this
populate _cbmem_top_ptr with cbmem_top_chipset which is also used in
romstage.
Change-Id: I8799c12705e944162c05fb7225ae21d32a2a882b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36557
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/nvidia/tegra210/ramstage.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c index 13fa1c6a02..2e01523060 100644 --- a/src/soc/nvidia/tegra210/ramstage.c +++ b/src/soc/nvidia/tegra210/ramstage.c @@ -15,6 +15,7 @@ #include <arch/lib_helpers.h> #include <arch/stages.h> +#include <cbmem.h> #include <console/console.h> #include <device/mmio.h> #include <gic.h> @@ -72,6 +73,11 @@ void ramstage_entry(void) if (tegra210_run_mtc() != 0) printk(BIOS_ERR, "MTC: No training data.\n"); + /* Ramstage is run on a different core, so passing cbmem_top + via calling arguments is not an option, but it is not a problem + to call cbmem_top_chipset() again here to populate _cbmem_top_ptr. */ + _cbmem_top_ptr = (uintptr_t)cbmem_top_chipset(); + /* Jump to boot state machine in common code. */ main(); } |