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authorFelix Held <felix-coreboot@felixheld.de>2023-11-04 04:56:16 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-11-06 10:49:45 +0000
commit8585fd08725a415a03ce62573a0be8568cccffd0 (patch)
treeec6b7a9aeddaee0739118ef7a7d53bea500d09d9 /src/soc
parent7bd043eda557ad2cdd09fca846ad067436c62986 (diff)
soc/amd/genoa/include/iomap: add missing I2C and I3C MMIO bases
All base addresses of MMIO devices in the devicetree should also have corresponding defines in iomap.h. PPR #55901 Rev 0.26 was used as a reference. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I0444e6cc0587b484a4a1ff49fa4b1540a24c8e80 Reviewed-on: https://review.coreboot.org/c/coreboot/+/78897 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/genoa/include/soc/iomap.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/include/soc/iomap.h b/src/soc/amd/genoa/include/soc/iomap.h
index 076938e302..5b767e3e27 100644
--- a/src/soc/amd/genoa/include/soc/iomap.h
+++ b/src/soc/amd/genoa/include/soc/iomap.h
@@ -18,9 +18,16 @@
#define APU_I2C1_BASE 0xfedc3000
#define APU_I2C2_BASE 0xfedc4000
#define APU_I2C3_BASE 0xfedc5000
+#define APU_I2C4_BASE 0xfedc6000
+#define APU_I2C5_BASE 0xfedcb000
#define APU_UART0_BASE 0xfedc9000
#define APU_UART1_BASE 0xfedca000
#define APU_UART2_BASE 0xfedce000
+#define APU_I3C0_BASE 0xfedd2000
+#define APU_I3C1_BASE 0xfedd3000
+#define APU_I3C2_BASE 0xfedd4000
+#define APU_I3C3_BASE 0xfedd6000
+
#endif /* AMD_GENOA_IOMAP_H */