summaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorDaisuke Nojiri <dnojiri@chromium.org>2015-03-04 11:01:36 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-22 08:40:20 +0200
commit73dd7b6d14d35967dc9f26213f78f3c6122361e8 (patch)
tree11b1e1854014dcba99602e317c44158bae347f9f /src/soc
parent99d39565da77056699ea011e82483092ec650153 (diff)
broadcom/cygnus: add timestamps in pre-ram stages
BUG=none BRANCH=broadcom-firmware TEST=timestamp table: 0501: 31858 0005: 106680 0503: 132098 0504: 135573 0006: 168656 0013: 168660 0014: 240487 0502: 240491 0001: 240515 0002: 247544 0003: 537158 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://chrome-internal-review.googlesource.com/204758 Reviewed-by: Julius Werner <jwerner@chromium.org> Commit-Queue: Daisuke Nojiri <dnojiri@google.com> Tested-by: Daisuke Nojiri <dnojiri@google.com> Change-Id: I5b4608152e97d53e35d28aa7bed2bfd158409df9 Reviewed-on: https://chromium-review.googlesource.com/256418 Reviewed-on: http://review.coreboot.org/9855 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/broadcom/cygnus/cbmem.c4
-rw-r--r--src/soc/broadcom/cygnus/romstage.c27
2 files changed, 6 insertions, 25 deletions
diff --git a/src/soc/broadcom/cygnus/cbmem.c b/src/soc/broadcom/cygnus/cbmem.c
index 4532b7e01c..6b11a95fb6 100644
--- a/src/soc/broadcom/cygnus/cbmem.c
+++ b/src/soc/broadcom/cygnus/cbmem.c
@@ -19,8 +19,10 @@
#include <cbmem.h>
#include <stddef.h>
+#include <symbols.h>
+#include <soc/sdram.h>
void *cbmem_top(void)
{
- return NULL;
+ return _dram + sdram_size_mb()*MiB;
}
diff --git a/src/soc/broadcom/cygnus/romstage.c b/src/soc/broadcom/cygnus/romstage.c
index f293f31d2a..13a0d4f0d6 100644
--- a/src/soc/broadcom/cygnus/romstage.c
+++ b/src/soc/broadcom/cygnus/romstage.c
@@ -35,25 +35,13 @@
void main(void)
{
-#if CONFIG_COLLECT_TIMESTAMPS
- uint64_t start_romstage_time;
- uint64_t before_dram_time;
- uint64_t after_dram_time;
- uint64_t base_time = timestamp_get();
- start_romstage_time = timestamp_get();
-#endif
+ timestamp_add_now(TS_START_ROMSTAGE);
console_init();
-#if CONFIG_COLLECT_TIMESTAMPS
- before_dram_time = timestamp_get();
-#endif
-
+ timestamp_add_now(TS_BEFORE_INITRAM);
sdram_init();
-
-#if CONFIG_COLLECT_TIMESTAMPS
- after_dram_time = timestamp_get();
-#endif
+ timestamp_add_now(TS_AFTER_INITRAM);
/* Now that DRAM is up, add mappings for it and DMA coherency buffer. */
mmu_config_range((uintptr_t)_dram/MiB,
@@ -63,14 +51,5 @@ void main(void)
cbmem_initialize_empty();
-#if CONFIG_COLLECT_TIMESTAMPS
- timestamp_init(base_time);
- timestamp_add(TS_START_ROMSTAGE, start_romstage_time);
- timestamp_add(TS_BEFORE_INITRAM, before_dram_time);
- timestamp_add(TS_AFTER_INITRAM, after_dram_time);
-
- timestamp_add_now(TS_END_ROMSTAGE);
-#endif
-
run_ramstage();
}