diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-11-18 20:41:40 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-24 17:03:56 +0000 |
| commit | 72b92c9207b8603693f64a4563fb5d14de95db05 (patch) | |
| tree | 453df0540d0e0b651b47a003cdc060f30492ea81 /src/soc | |
| parent | 7f61d41c1b8e747c19d40c68291020035493678d (diff) | |
soc/amd/picasso,stoneyridge/acpi: use define for RTC_DATE_ALARM
Cezanne already uses a define for this and it's better to define and use
constants instead of magic values.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ifa4b3b3cdb161670128b284a3396fc5a85545608
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59586
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/picasso/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/acpi.h | 3 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/acpi.c | 2 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/acpi.h | 3 |
4 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index c0808d9f2e..a90cbcf54d 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -92,7 +92,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ - fadt->day_alrm = 0x0d; + fadt->day_alrm = RTC_DATE_ALARM; fadt->mon_alrm = 0; fadt->iapc_boot_arch = cfg->fadt_boot_arch; /* legacy free default */ fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ diff --git a/src/soc/amd/picasso/include/soc/acpi.h b/src/soc/amd/picasso/include/soc/acpi.h index 804b27cd0c..20876906c5 100644 --- a/src/soc/amd/picasso/include/soc/acpi.h +++ b/src/soc/amd/picasso/include/soc/acpi.h @@ -8,6 +8,9 @@ #include <device/device.h> #include <stdint.h> +/* RTC Registers */ +#define RTC_DATE_ALARM 0x0d + uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current, acpi_rsdp_t *rsdp); diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index b2de89e016..918ba5e6d7 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -84,7 +84,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->duty_offset = 1; /* CLK_VAL bits 3:1 */ fadt->duty_width = 3; /* CLK_VAL bits 3:1 */ - fadt->day_alrm = 0x0d; + fadt->day_alrm = RTC_DATE_ALARM; fadt->mon_alrm = 0; /* Not supported */ fadt->iapc_boot_arch = FADT_BOOT_ARCH; /* See table 5-10 */ fadt->res2 = 0; /* reserved, MUST be 0 ACPI 3.0 */ diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h index f0c35c070c..21ffd5fbdc 100644 --- a/src/soc/amd/stoneyridge/include/soc/acpi.h +++ b/src/soc/amd/stoneyridge/include/soc/acpi.h @@ -12,6 +12,9 @@ #define FADT_BOOT_ARCH (ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042) #endif +/* RTC Registers */ +#define RTC_DATE_ALARM 0x0d + const char *soc_acpi_name(const struct device *dev); #endif /* AMD_STONEYRIDGE_ACPI_H */ |