diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2023-02-06 18:58:28 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-08 15:13:04 +0000 |
commit | 6f375320c3fafc5f501cd7bbace82026eae32cd3 (patch) | |
tree | 5b10b0568b9e36c593087c458c3de72c5fd0002a /src/soc | |
parent | 180e414a801935b3557c9a932c87e61acf2c697a (diff) |
soc/amd/picasso: use CPUID_FROM_FMS macro instead of magic numbers
TEST=Resulting image of timeless build for Mandolin doesn't change.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I44cb7759206e9e1ce79fd57f62b9a844e52f7394
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72857
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/picasso/include/soc/cpu.h | 8 | ||||
-rw-r--r-- | src/soc/amd/picasso/soc_util.c | 8 |
2 files changed, 7 insertions, 9 deletions
diff --git a/src/soc/amd/picasso/include/soc/cpu.h b/src/soc/amd/picasso/include/soc/cpu.h index 7051bb8b10..28f395c1d6 100644 --- a/src/soc/amd/picasso/include/soc/cpu.h +++ b/src/soc/amd/picasso/include/soc/cpu.h @@ -3,11 +3,9 @@ #ifndef AMD_PICASSO_CPU_H #define AMD_PICASSO_CPU_H -#define RAVEN1_B0_CPUID 0x00810f10 -#define PICASSO_B0_CPUID 0x00810f80 -#define PICASSO_B1_CPUID 0x00810f81 -#define RAVEN2_A0_CPUID 0x00820f00 -#define RAVEN2_A1_CPUID 0x00820f01 +#define RAVEN1_B0_CPUID CPUID_FROM_FMS(0x17, 0x11, 0) +#define PICASSO_B0_CPUID CPUID_FROM_FMS(0x17, 0x18, 0) +#define RAVEN2_A0_CPUID CPUID_FROM_FMS(0x17, 0x20, 0) #define RAVEN1_VBIOS_VID_DID 0x100215dd #define RAVEN1_VBIOS_REV 0x81 diff --git a/src/soc/amd/picasso/soc_util.c b/src/soc/amd/picasso/soc_util.c index 9616f26bf5..59c82c65cd 100644 --- a/src/soc/amd/picasso/soc_util.c +++ b/src/soc/amd/picasso/soc_util.c @@ -94,7 +94,7 @@ static bool is_mystery_silicon(void) static bool is_fam17_1x(void) { /* mask lower model number nibble and stepping */ - return cpuid_eax(1) >> 8 == PICASSO_B1_CPUID >> 8; + return cpuid_eax(1) >> 8 == PICASSO_B0_CPUID >> 8; } static bool is_fam17_11(void) @@ -106,19 +106,19 @@ static bool is_fam17_11(void) static bool is_fam17_18(void) { /* only mask stepping */ - return cpuid_eax(1) >> 4 == PICASSO_B1_CPUID >> 4; + return cpuid_eax(1) >> 4 == PICASSO_B0_CPUID >> 4; } static bool is_fam17_2x(void) { /* mask lower model number nibble and stepping */ - return cpuid_eax(1) >> 8 == RAVEN2_A1_CPUID >> 8; + return cpuid_eax(1) >> 8 == RAVEN2_A0_CPUID >> 8; } static bool is_fam17_20(void) { /* only mask stepping */ - return cpuid_eax(1) >> 4 == RAVEN2_A1_CPUID >> 4; + return cpuid_eax(1) >> 4 == RAVEN2_A0_CPUID >> 4; } enum silicon_type get_silicon_type(void) |