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authorSubrata Banik <subrata.banik@intel.com>2021-06-21 19:23:49 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-06-23 08:26:05 +0000
commit5dea3162506270e713347c9ca67717d292007cbd (patch)
tree0b88cb7792729ace8b11b4eb82bfc3b1bbc4b637 /src/soc
parent1369544b3f6c571886f602824c5f005eb60e9a16 (diff)
soc/intel/elkhartlake: Use devfn_disable() function for XDCI
Use devfn_disable() for disabling a PCI device rather than using `dev->enabled = 0`. Also, use is_devfn_enabled() to get the device current state prior updating the FSP-S UPD for XDCI. TEST=FSP-S disabled XDCI when `xdci_can_enable` returns 0 and XDCI is disabled at PCI enumeration `PCI: 00:14.1: enabled 0`. Change-Id: I8ca0813e18da0f95eb9293b6d0bbdf933a1e7039 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55725 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/elkhartlake/fsp_params.c12
1 files changed, 3 insertions, 9 deletions
diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c
index 9797728bf4..97cd2847ac 100644
--- a/src/soc/intel/elkhartlake/fsp_params.c
+++ b/src/soc/intel/elkhartlake/fsp_params.c
@@ -181,15 +181,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
params->UsbPowerGatingEnable = 1;
/* Enable xDCI controller if enabled in devicetree and allowed */
- dev = pcidev_path_on_root(PCH_DEVFN_USBOTG);
- if (dev) {
- if (!xdci_can_enable())
- dev->enabled = 0;
-
- params->XdciEnable = dev->enabled;
- } else {
- params->XdciEnable = 0;
- }
+ if (!xdci_can_enable())
+ devfn_disable(pci_root_bus(), PCH_DEVFN_USBOTG);
+ params->XdciEnable = is_devfn_enabled(PCH_DEVFN_USBOTG);
/* PCIe root ports config */
for (i = 0; i < CONFIG_MAX_ROOT_PORTS; i++) {