diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-06-14 12:01:58 +0300 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-24 11:48:38 +0000 |
commit | 5daa1d38985a19dc84f2299dba2e340dda2870ae (patch) | |
tree | 5ffc76d72e2b7676f520b21808c7c35709ce30d0 /src/soc | |
parent | e37459ed64b40a23880babf430fd92a847752053 (diff) |
ACPI: Replace uses of CBMEM_ID_ACPI_GNVS
These are the simple cbmem_find() cases. Also drop the redundant
error messages.
Change-Id: I78e5445eb09c322ff94fe4f65345eb2997bd10ef
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42361
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/picasso/southbridge.c | 5 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/southbridge.c | 5 | ||||
-rw-r--r-- | src/soc/intel/baytrail/lpe.c | 8 | ||||
-rw-r--r-- | src/soc/intel/baytrail/lpss.c | 8 | ||||
-rw-r--r-- | src/soc/intel/baytrail/scc.c | 8 | ||||
-rw-r--r-- | src/soc/intel/braswell/lpe.c | 8 | ||||
-rw-r--r-- | src/soc/intel/braswell/lpss.c | 8 | ||||
-rw-r--r-- | src/soc/intel/braswell/scc.c | 8 | ||||
-rw-r--r-- | src/soc/intel/broadwell/adsp.c | 8 | ||||
-rw-r--r-- | src/soc/intel/broadwell/serialio.c | 8 | ||||
-rw-r--r-- | src/soc/intel/common/acpi_wake_source.c | 4 | ||||
-rw-r--r-- | src/soc/intel/common/block/acpi/acpi.c | 3 | ||||
-rw-r--r-- | src/soc/intel/common/block/uart/uart.c | 4 | ||||
-rw-r--r-- | src/soc/intel/common/nhlt.c | 4 |
14 files changed, 38 insertions, 51 deletions
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c index 0d908c3f73..45f66d6b5b 100644 --- a/src/soc/amd/picasso/southbridge.c +++ b/src/soc/amd/picasso/southbridge.c @@ -10,6 +10,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <amdblocks/amd_pci_util.h> #include <amdblocks/reset.h> #include <amdblocks/acpimmio.h> @@ -308,7 +309,7 @@ static void set_nvs_sws(void *unused) sws = cbmem_find(CBMEM_ID_POWER_STATE); if (sws == NULL) return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + gnvs = acpi_get_gnvs(); if (gnvs == NULL) return; @@ -336,7 +337,7 @@ void southbridge_init(void *chip_info) static void set_sb_final_nvs(void) { - struct global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + struct global_nvs_t *gnvs = acpi_get_gnvs(); if (gnvs == NULL) return; diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index e90fe1b457..f21734902b 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -8,6 +8,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <amdblocks/amd_pci_util.h> #include <amdblocks/agesawrapper.h> #include <amdblocks/reset.h> @@ -542,7 +543,7 @@ static void set_nvs_sws(void *unused) sws = cbmem_find(CBMEM_ID_POWER_STATE); if (sws == NULL) return; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + gnvs = acpi_get_gnvs(); if (gnvs == NULL) return; @@ -575,7 +576,7 @@ static void set_sb_final_nvs(void) size_t fwsize; const struct device *sd, *sata; - struct global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + struct global_nvs_t *gnvs = acpi_get_gnvs(); if (gnvs == NULL) return; diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c index cb5c50c12a..78638de816 100644 --- a/src/soc/intel/baytrail/lpe.c +++ b/src/soc/intel/baytrail/lpe.c @@ -2,7 +2,7 @@ #include <device/mmio.h> #include <device/pci_ops.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -53,11 +53,9 @@ static void lpe_enable_acpi_mode(struct device *dev) global_nvs_t *gnvs; /* Find ACPI NVS to update BARs */ - gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_ERR, "Unable to locate Global NVS\n"); + gnvs = acpi_get_gnvs(); + if (!gnvs) return; - } /* Save BAR0, BAR1, and firmware base to ACPI NVS */ assign_device_nvs(dev, &gnvs->dev.lpe_bar0, PCI_BASE_ADDRESS_0); diff --git a/src/soc/intel/baytrail/lpss.c b/src/soc/intel/baytrail/lpss.c index 6b87cf012a..d5c3e4de31 100644 --- a/src/soc/intel/baytrail/lpss.c +++ b/src/soc/intel/baytrail/lpss.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <stdint.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -31,11 +31,9 @@ static void dev_enable_acpi_mode(struct device *dev, int iosf_reg, global_nvs_t *gnvs; /* Find ACPI NVS to update BARs */ - gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_ERR, "Unable to locate Global NVS\n"); + gnvs = acpi_get_gnvs(); + if (!gnvs) return; - } /* Save BAR0 and BAR1 to ACPI NVS */ bar = find_resource(dev, PCI_BASE_ADDRESS_0); diff --git a/src/soc/intel/baytrail/scc.c b/src/soc/intel/baytrail/scc.c index 71b5f9a817..455f243184 100644 --- a/src/soc/intel/baytrail/scc.c +++ b/src/soc/intel/baytrail/scc.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -84,11 +84,9 @@ void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index) global_nvs_t *gnvs; /* Find ACPI NVS to update BARs */ - gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_ERR, "Unable to locate Global NVS\n"); + gnvs = acpi_get_gnvs(); + if (!gnvs) return; - } /* Save BAR0 and BAR1 to ACPI NVS */ bar = find_resource(dev, PCI_BASE_ADDRESS_0); diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c index 394715eb5a..f3391de443 100644 --- a/src/soc/intel/braswell/lpe.c +++ b/src/soc/intel/braswell/lpe.c @@ -2,7 +2,7 @@ #include <device/mmio.h> #include <device/pci_ops.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -56,11 +56,9 @@ static void lpe_enable_acpi_mode(struct device *dev) global_nvs_t *gnvs; /* Find ACPI NVS to update BARs */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_ERR, "Unable to locate Global NVS\n"); + gnvs = acpi_get_gnvs(); + if (!gnvs) return; - } /* Save BAR0, BAR1, and firmware base to ACPI NVS */ assign_device_nvs(dev, &gnvs->dev.lpe_bar0, PCI_BASE_ADDRESS_0); diff --git a/src/soc/intel/braswell/lpss.c b/src/soc/intel/braswell/lpss.c index c173990e85..82002487af 100644 --- a/src/soc/intel/braswell/lpss.c +++ b/src/soc/intel/braswell/lpss.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <stdint.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -30,11 +30,9 @@ static void dev_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index global_nvs_t *gnvs; /* Find ACPI NVS to update BARs */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_ERR, "Unable to locate Global NVS\n"); + gnvs = acpi_get_gnvs(); + if (!gnvs) return; - } /* Save BAR0 and BAR1 to ACPI NVS */ bar = find_resource(dev, PCI_BASE_ADDRESS_0); diff --git a/src/soc/intel/braswell/scc.c b/src/soc/intel/braswell/scc.c index df7dd7db6d..0b6385fc24 100644 --- a/src/soc/intel/braswell/scc.c +++ b/src/soc/intel/braswell/scc.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -18,11 +18,9 @@ void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index) __FILE__, __func__, dev_name(dev), iosf_reg, nvs_index); /* Find ACPI NVS to update BARs */ - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_ERR, "Unable to locate Global NVS\n"); + gnvs = acpi_get_gnvs(); + if (!gnvs) return; - } /* Save BAR0 and BAR1 to ACPI NVS */ bar = find_resource(dev, PCI_BASE_ADDRESS_0); diff --git a/src/soc/intel/broadwell/adsp.c b/src/soc/intel/broadwell/adsp.c index b8699a223f..27368c0518 100644 --- a/src/soc/intel/broadwell/adsp.c +++ b/src/soc/intel/broadwell/adsp.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -85,11 +85,9 @@ static void adsp_init(struct device *dev) printk(BIOS_INFO, "ADSP: Enable ACPI Mode IRQ3\n"); /* Find ACPI NVS to update BARs */ - gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_ERR, "Unable to locate Global NVS\n"); + gnvs = acpi_get_gnvs(); + if (!gnvs) return; - } /* Save BAR0 and BAR1 to ACPI NVS */ gnvs->dev.bar0[SIO_NVS_ADSP] = (u32)bar0->base; diff --git a/src/soc/intel/broadwell/serialio.c b/src/soc/intel/broadwell/serialio.c index 20a5d9a5df..4da3979ed5 100644 --- a/src/soc/intel/broadwell/serialio.c +++ b/src/soc/intel/broadwell/serialio.c @@ -2,7 +2,7 @@ #include <device/mmio.h> #include <device/pci_ops.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -236,11 +236,9 @@ static void serialio_init(struct device *dev) global_nvs_t *gnvs; /* Find ACPI NVS to update BARs */ - gnvs = (global_nvs_t *)cbmem_find(CBMEM_ID_ACPI_GNVS); - if (!gnvs) { - printk(BIOS_ERR, "Unable to locate Global NVS\n"); + gnvs = acpi_get_gnvs(); + if (!gnvs) return; - } /* Save BAR0 and BAR1 to ACPI NVS */ gnvs->dev.bar0[sio_index] = (u32)bar0->base; diff --git a/src/soc/intel/common/acpi_wake_source.c b/src/soc/intel/common/acpi_wake_source.c index 9f30366a7b..1342c80ebd 100644 --- a/src/soc/intel/common/acpi_wake_source.c +++ b/src/soc/intel/common/acpi_wake_source.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> +#include <acpi/acpi_gnvs.h> #include <bootstate.h> -#include <cbmem.h> #include <console/console.h> #include <soc/nvs.h> #include <stdint.h> @@ -16,7 +16,7 @@ __weak int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) /* Save wake source data for ACPI _SWS methods in NVS */ static void acpi_save_wake_source(void *unused) { - global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + global_nvs_t *gnvs = acpi_get_gnvs(); uint32_t pm1, *gpe0; int gpe_reg, gpe_reg_count; int reg_size = sizeof(uint32_t) * 8; diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 4e4906c5ad..8d75c9a147 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -6,6 +6,7 @@ #include <bootstate.h> #include <cbmem.h> #include <cf9_reset.h> +#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> @@ -456,7 +457,7 @@ void generate_cpu_entries(const struct device *device) /* Save wake source data for ACPI _SWS methods in NVS */ static void acpi_save_wake_source(void *unused) { - global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + global_nvs_t *gnvs = acpi_get_gnvs(); uint32_t pm1, *gpe0; int gpe_reg, gpe_reg_count; int reg_size = sizeof(uint32_t) * 8; diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index cc5e485d33..0c641f3746 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <console/uart.h> #include <device/device.h> #include <device/pci.h> @@ -167,7 +167,7 @@ static void uart_read_resources(struct device *dev) */ static bool pch_uart_init_debug_controller_on_resume(void) { - global_nvs_t *gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + global_nvs_t *gnvs = acpi_get_gnvs(); if (gnvs) return !!gnvs->uior; diff --git a/src/soc/intel/common/nhlt.c b/src/soc/intel/common/nhlt.c index 5d916ab7e4..099be5d8bd 100644 --- a/src/soc/intel/common/nhlt.c +++ b/src/soc/intel/common/nhlt.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <cbmem.h> +#include <acpi/acpi_gnvs.h> #include <nhlt.h> #include <soc/nvs.h> @@ -15,7 +15,7 @@ uintptr_t nhlt_soc_serialize_oem_overrides(struct nhlt *nhlt, { global_nvs_t *gnvs; - gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS); + gnvs = acpi_get_gnvs(); if (gnvs == NULL) return acpi_addr; |