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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-08-27 23:32:56 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-09-14 22:11:25 +0000
commit44e4bf26a19136d389d0ff94bd3d8bdae35c732a (patch)
tree724e2efad1225741ddaa8265c3ef60b22a160990 /src/soc
parent4371bb96d4f5ce8000f1a10fd37c671e4cdd3705 (diff)
soc/amd/cezanne/Kconfig: add defaults for FSP_M_FILE and FSP_S_FILE
Now that the FSP binary check logic is fixed to only check the FSP files if ADD_FSP_BINARIES is selected, the default paths for the not yet published Cezanne FSP binaries can be added without breaking abuild. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I9950a1fe7bd1b21109cca9631de1a8f1d265d9b2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/Kconfig14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index ce1688941a..43c83bfcf1 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -87,6 +87,20 @@ config CHIPSET_DEVICETREE
string
default "soc/amd/cezanne/chipset.cb"
+config FSP_M_FILE
+ string "FSP-M (memory init) binary path and filename"
+ depends on ADD_FSP_BINARIES
+ default "3rdparty/amd_blobs/cezanne/CEZANNE_M.fd"
+ help
+ The path and filename of the FSP-M binary for this platform.
+
+config FSP_S_FILE
+ string "FSP-S (silicon init) binary path and filename"
+ depends on ADD_FSP_BINARIES
+ default "3rdparty/amd_blobs/cezanne/CEZANNE_S.fd"
+ help
+ The path and filename of the FSP-S binary for this platform.
+
config EARLY_RESERVED_DRAM_BASE
hex
default 0x2000000