diff options
author | Bora Guvendik <bora.guvendik@intel.com> | 2022-08-26 10:55:49 -0700 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-08-29 14:25:25 +0000 |
commit | 3f6de867e891464c9f5dd22aea2247d5dc86d5e9 (patch) | |
tree | 39a0955117f015e5d37eec090e28de32b4692c87 /src/soc | |
parent | 5502ad1011dfff646120b383e60d233285cf6efa (diff) |
soc/intel/alderlake: Rename pcie5 alias
Rename pcie5 alias as pcie5_0 since raptorlake is adding a new pcie5 RC.
BRANCH=firmware-brya-14505.B
TEST=none
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Iee669e68e3607b7ffec9f0800e9f0a916defd498
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67107
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/intel/alderlake/chipset.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb index 6bfa76942a..3f70b3090a 100644 --- a/src/soc/intel/alderlake/chipset.cb +++ b/src/soc/intel/alderlake/chipset.cb @@ -92,7 +92,7 @@ chip soc/intel/alderlake device domain 0 on device gpio 0 alias pch_gpio on end device pci 00.0 alias system_agent on end - device pci 01.0 alias pcie5 off end + device pci 01.0 alias pcie5_0 off end device pci 02.0 alias igpu off end device pci 04.0 alias dtt off end device pci 05.0 alias ipu off end |