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authorArthur Heymans <arthur@aheymans.xyz>2022-04-06 22:25:50 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-07-20 20:28:39 +0000
commit3e914d372661ba68ca92d476708bd68af2593b10 (patch)
treed387bc1342a0653b7fcbf53bb8c2b3034d630fc3 /src/soc
parenta91821b677b0162e07f0f4e31b738d46992dccaf (diff)
arch/arm64,arm: Prepare for !SEPARATE_ROMSTAGE
Prepare platforms for linking romstage code in the bootblock. Change-Id: Ic20799b4d6e3f62cd05791a2bd275000a12cc83c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63420 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/nvidia/tegra210/romstage.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/nvidia/tegra210/romstage.c b/src/soc/nvidia/tegra210/romstage.c
index 12cf297d1c..801e96336b 100644
--- a/src/soc/nvidia/tegra210/romstage.c
+++ b/src/soc/nvidia/tegra210/romstage.c
@@ -6,13 +6,14 @@
#include <console/console.h>
#include <lib.h>
#include <program_loading.h>
+#include <romstage_common.h>
#include <soc/addressmap.h>
#include <soc/ccplex.h>
#include <soc/clock.h>
+#include <soc/nvidia/tegra/apbmisc.h>
+#include <soc/romstage.h>
#include <soc/sdram.h>
#include <soc/sdram_configs.h>
-#include <soc/romstage.h>
-#include <soc/nvidia/tegra/apbmisc.h>
#include <symbols.h>
#include <vendorcode/google/chromeos/chromeos.h>
@@ -26,6 +27,11 @@ void romstage(void)
console_init();
exception_init();
+ romstage_main();
+}
+
+void __noreturn romstage_main(void)
+{
printk(BIOS_INFO, "T210: romstage here\n");
#if CONFIG(BOOTROM_SDRAM_INIT)