diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-31 15:29:13 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-04-01 15:05:38 +0000 |
commit | 3924e1891d5c1594229fbd00fe0d898f4b449f38 (patch) | |
tree | 34b86748817229da663efd3c8aceeb7f3b4f7e1a /src/soc | |
parent | 0fb774024d222745d6c016bc179ca9d34b86def0 (diff) |
soc/amd/stoneyridge/Makefile: use all target for more compilation units
monotonic_timer.c, tsc_freq.c and uart.c get added to all stage targets,
so just add those to the all stage targets. They still need to be added
to the smm stage target, since the all target doesn't add things to the
smm stage.
TEST=Timeless build results in identical image for Gardenia.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I16c02bc0ff54553f212b94d110abef6a7bdedbb4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74144
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 18 |
1 files changed, 3 insertions, 15 deletions
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 656fa2ee50..1e8e794fe6 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -5,15 +5,12 @@ ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE),y) subdirs-y += ../../../cpu/amd/mtrr/ bootblock-y += aoac.c -bootblock-y += uart.c bootblock-y += BiosCallOuts.c bootblock-y += bootblock.c bootblock-y += early_fch.c bootblock-y += gpio.c bootblock-y += i2c.c bootblock-y += enable_usbdebug.c -bootblock-y += monotonic_timer.c -bootblock-y += tsc_freq.c romstage-y += BiosCallOuts.c romstage-y += i2c.c @@ -21,24 +18,15 @@ romstage-y += romstage.c romstage-y += enable_usbdebug.c romstage-y += fch_agesa.c romstage-y += gpio.c -romstage-y += monotonic_timer.c romstage-y += smbus_spd.c romstage-y += memmap.c -romstage-y += uart.c -romstage-y += tsc_freq.c romstage-y += psp.c verstage-y += gpio.c verstage-y += i2c.c -verstage-y += monotonic_timer.c -verstage-y += uart.c -verstage-y += tsc_freq.c -postcar-y += monotonic_timer.c -postcar-y += uart.c postcar-y += memmap.c postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c -postcar-y += tsc_freq.c ramstage-y += BiosCallOuts.c ramstage-y += i2c.c @@ -51,16 +39,16 @@ ramstage-y += fch.c ramstage-y += fch_agesa.c ramstage-y += gpio.c ramstage-y += graphics.c -ramstage-y += monotonic_timer.c ramstage-y += northbridge.c ramstage-y += sata.c ramstage-y += memmap.c -ramstage-y += uart.c ramstage-y += usb.c -ramstage-y += tsc_freq.c ramstage-y += psp.c +all-y += monotonic_timer.c all-y += reset.c +all-y += tsc_freq.c +all-y += uart.c smm-y += monotonic_timer.c smm-y += smihandler.c |