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authorFelix Held <felix-coreboot@felixheld.de>2021-12-07 01:13:54 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-01-07 13:20:30 +0000
commit2b1afef1eaaf2012b5b70eb6407350e9265c6410 (patch)
treedd379e381d7c297b7ddeeacba4baa5dbac0f5c24 /src/soc
parent38712b84ba5ee2ee3a2a490cdd8f1b5429980eb5 (diff)
soc/amd/common/block/include/lpc: add comment about RANGE_UNIT values
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I22f3485ec81f76af7e0e96b7c1271d5ccf52e701 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60771 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/include/amdblocks/lpc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/lpc.h b/src/soc/amd/common/block/include/amdblocks/lpc.h
index 173cbd15ff..558b608743 100644
--- a/src/soc/amd/common/block/include/amdblocks/lpc.h
+++ b/src/soc/amd/common/block/include/amdblocks/lpc.h
@@ -74,7 +74,7 @@
#define ROM_BASE_MASK 0xfffff000 /* bits 31-12 */
#define ROM_RANGE_WP BIT(10)
#define ROM_RANGE_RP BIT(9)
-#define RANGE_UNIT BIT(8)
+#define RANGE_UNIT BIT(8) /* 0: 4kiB, 1: 64kiB */
#define RANGE_ADDR_MASK 0x000000ff /* Range defined by bits 7-0 */
#define ROM_PROTECT_RANGE_REG(n) (ROM_PROTECT_RANGE0 + (4 * n))
#define MAX_ROM_PROTECT_RANGES 4