diff options
| author | Subrata Banik <subratabanik@google.com> | 2024-06-18 13:16:44 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-06-21 03:20:56 +0000 |
| commit | 2a84b8334970fb22b4b32ff0d638092fc81fbc12 (patch) | |
| tree | db152fbcdcf077c799ce6b2fb69eb889f86177a2 /src/soc | |
| parent | 6fc8bd9a7b238ac9d9c83a86226e668659514235 (diff) | |
soc/intel/cmn/acpi: Add support for `PCR_BASE_ADDRESS` above 4 GiB
This change updates the Northbridge ASL to conditionally include a
QWordMemory resource for `SM01` when the `CONFIG_PCR_BASE_ADDRESS`
is above 4 GiB.
If `CONFIG_PCR_BASE_ADDRESS` is below 4 GiB, or falls within the
PCH reserved range, the existing handling of `SM01` remains unchanged
(as a DWordMemory resource).
TEST=Built with CONFIG_PCR_BASE_ADDRESS both above and below 4 GiB,
verified ASL output.
Change-Id: I9547377cdea6cb4334ab59b3bc837059fbb22e3b
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83112
Reviewed-by: Cliff Huang <cliff.huang@intel.com>
Reviewed-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/acpi/acpi/northbridge.asl | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/acpi/acpi/northbridge.asl b/src/soc/intel/common/block/acpi/acpi/northbridge.asl index 03295b4ca7..51b0e23100 100644 --- a/src/soc/intel/common/block/acpi/acpi/northbridge.asl +++ b/src/soc/intel/common/block/acpi/acpi/northbridge.asl @@ -166,7 +166,12 @@ Method (_CRS, 0, Serialized) 0x00000000, 0x10000, 0x1ffff, 0x00000000, 0x10000,,, PM02) -#if !((CONFIG_PCR_BASE_ADDRESS >= PCH_PRESERVED_BASE_ADDRESS) && \ +#if (CONFIG_PCR_BASE_ADDRESS >= (4ULL * GiB)) + QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, + NonCacheable, ReadWrite, + 0x00000000, 0x000000000, 0x00000000, 0x00000000, + 0x00000000,,, SM01) +#elif !((CONFIG_PCR_BASE_ADDRESS >= PCH_PRESERVED_BASE_ADDRESS) && \ (CONFIG_PCR_BASE_ADDRESS < PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE)) /* SBREG BAR if outside of PCH reserved resource */ DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, @@ -202,13 +207,19 @@ Method (_CRS, 0, Serialized) PMIN = \_SB.PCI0.MCHC.TLUD & (0xfff << 20) PLEN = PMAX - PMIN + 1 -#if !((CONFIG_PCR_BASE_ADDRESS >= PCH_PRESERVED_BASE_ADDRESS) && \ +#if (CONFIG_PCR_BASE_ADDRESS >= (4ULL * GiB)) + CreateQwordField (MCRS, SM01._MIN, SMIN) + CreateQwordField (MCRS, SM01._MAX, SMAX) + CreateQwordField (MCRS, SM01._LEN, SLEN) + SMIN = P2SB_BAR + SLEN = P2SB_SIZE + SMAX = SMIN + SLEN - 1 +#elif !((CONFIG_PCR_BASE_ADDRESS >= PCH_PRESERVED_BASE_ADDRESS) && \ (CONFIG_PCR_BASE_ADDRESS < PCH_PRESERVED_BASE_ADDRESS + PCH_PRESERVED_BASE_SIZE)) /* Fix up SBREG BAR memory region if outside PCH reserved resource */ CreateDwordField (MCRS, SM01._MIN, SMIN) CreateDwordField (MCRS, SM01._MAX, SMAX) CreateDwordField (MCRS, SM01._LEN, SLEN) - SMIN = P2SB_BAR SLEN = P2SB_SIZE SMAX = SMIN + SLEN - 1 |